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Kirill Smelkov
linux
Commits
e9dad875
Commit
e9dad875
authored
Apr 03, 2012
by
Tony Lindgren
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Merge branch 'misc_devel_3.4' of
git://git.pwsan.com/linux-2.6
into fixes
parents
dd775ae2
553e3222
Changes
2
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2 changed files
with
16 additions
and
13 deletions
+16
-13
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-omap2/omap_hwmod.c
+5
-3
arch/arm/mach-omap2/prm44xx.c
arch/arm/mach-omap2/prm44xx.c
+11
-10
No files found.
arch/arm/mach-omap2/omap_hwmod.c
View file @
e9dad875
...
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
...
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
*/
*/
static
int
_ocp_softreset
(
struct
omap_hwmod
*
oh
)
static
int
_ocp_softreset
(
struct
omap_hwmod
*
oh
)
{
{
u32
v
;
u32
v
,
softrst_mask
;
int
c
=
0
;
int
c
=
0
;
int
ret
=
0
;
int
ret
=
0
;
...
@@ -1427,11 +1427,13 @@ static int _ocp_softreset(struct omap_hwmod *oh)
...
@@ -1427,11 +1427,13 @@ static int _ocp_softreset(struct omap_hwmod *oh)
oh
->
class
->
sysc
->
syss_offs
)
oh
->
class
->
sysc
->
syss_offs
)
&
SYSS_RESETDONE_MASK
),
&
SYSS_RESETDONE_MASK
),
MAX_MODULE_SOFTRESET_WAIT
,
c
);
MAX_MODULE_SOFTRESET_WAIT
,
c
);
else
if
(
oh
->
class
->
sysc
->
sysc_flags
&
SYSC_HAS_RESET_STATUS
)
else
if
(
oh
->
class
->
sysc
->
sysc_flags
&
SYSC_HAS_RESET_STATUS
)
{
softrst_mask
=
(
0x1
<<
oh
->
class
->
sysc
->
sysc_fields
->
srst_shift
);
omap_test_timeout
(
!
(
omap_hwmod_read
(
oh
,
omap_test_timeout
(
!
(
omap_hwmod_read
(
oh
,
oh
->
class
->
sysc
->
sysc_offs
)
oh
->
class
->
sysc
->
sysc_offs
)
&
SYSC_TYPE2_SOFTRESET_MASK
),
&
softrst_mask
),
MAX_MODULE_SOFTRESET_WAIT
,
c
);
MAX_MODULE_SOFTRESET_WAIT
,
c
);
}
if
(
c
==
MAX_MODULE_SOFTRESET_WAIT
)
if
(
c
==
MAX_MODULE_SOFTRESET_WAIT
)
pr_warning
(
"omap_hwmod: %s: softreset failed (waited %d usec)
\n
"
,
pr_warning
(
"omap_hwmod: %s: softreset failed (waited %d usec)
\n
"
,
...
...
arch/arm/mach-omap2/prm44xx.c
View file @
e9dad875
...
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
...
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
u32
mask
,
st
;
u32
mask
,
st
;
/* XXX read mask from RAM? */
/* XXX read mask from RAM? */
mask
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_DEVICE_INST
,
irqen_offs
);
mask
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_OCP_SOCKET_INST
,
st
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_DEVICE_INST
,
irqst_offs
);
irqen_offs
);
st
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_OCP_SOCKET_INST
,
irqst_offs
);
return
mask
&
st
;
return
mask
&
st
;
}
}
...
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
...
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
*/
*/
void
omap44xx_prm_ocp_barrier
(
void
)
void
omap44xx_prm_ocp_barrier
(
void
)
{
{
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_REVISION_PRM_OFFSET
);
OMAP4_REVISION_PRM_OFFSET
);
}
}
...
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
...
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
void
omap44xx_prm_save_and_clear_irqen
(
u32
*
saved_mask
)
void
omap44xx_prm_save_and_clear_irqen
(
u32
*
saved_mask
)
{
{
saved_mask
[
0
]
=
saved_mask
[
0
]
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQSTATUS_MPU_OFFSET
);
OMAP4_PRM_IRQSTATUS_MPU_OFFSET
);
saved_mask
[
1
]
=
saved_mask
[
1
]
=
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET
);
OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET
);
omap4_prm_write_inst_reg
(
0
,
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_write_inst_reg
(
0
,
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQENABLE_MPU_OFFSET
);
OMAP4_PRM_IRQENABLE_MPU_OFFSET
);
omap4_prm_write_inst_reg
(
0
,
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_write_inst_reg
(
0
,
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET
);
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET
);
/* OCP barrier */
/* OCP barrier */
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_read_inst_reg
(
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_REVISION_PRM_OFFSET
);
OMAP4_REVISION_PRM_OFFSET
);
}
}
...
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
...
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
*/
*/
void
omap44xx_prm_restore_irqen
(
u32
*
saved_mask
)
void
omap44xx_prm_restore_irqen
(
u32
*
saved_mask
)
{
{
omap4_prm_write_inst_reg
(
saved_mask
[
0
],
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_write_inst_reg
(
saved_mask
[
0
],
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQENABLE_MPU_OFFSET
);
OMAP4_PRM_IRQENABLE_MPU_OFFSET
);
omap4_prm_write_inst_reg
(
saved_mask
[
1
],
OMAP4430_PRM_
DEVICE
_INST
,
omap4_prm_write_inst_reg
(
saved_mask
[
1
],
OMAP4430_PRM_
OCP_SOCKET
_INST
,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET
);
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET
);
}
}
...
...
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