Commit ebc96db7 authored by Ulf Hansson's avatar Ulf Hansson Committed by Mike Turquette

ARM: ux500: Switch to use common clock framework

Remove machine specific clock implementation and switch to use
new common clock framework.
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 0e6dcde7
...@@ -11,6 +11,7 @@ config UX500_SOC_COMMON ...@@ -11,6 +11,7 @@ config UX500_SOC_COMMON
select CACHE_L2X0 select CACHE_L2X0
select PINCTRL select PINCTRL
select PINCTRL_NOMADIK select PINCTRL_NOMADIK
select COMMON_CLK
config UX500_SOC_DB8500 config UX500_SOC_DB8500
bool bool
......
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
# Makefile for the linux kernel, U8500 machine. # Makefile for the linux kernel, U8500 machine.
# #
obj-y := clock.o cpu.o devices.o devices-common.o \ obj-y := cpu.o devices.o devices-common.o \
id.o usb.o timer.o id.o usb.o timer.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
......
This diff is collapsed.
/*
* Copyright (C) 2010 ST-Ericsson
* Copyright (C) 2009 STMicroelectronics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/**
* struct clkops - ux500 clock operations
* @enable: function to enable the clock
* @disable: function to disable the clock
* @get_rate: function to get the current clock rate
*
* This structure contains function pointers to functions that will be used to
* control the clock. All of these functions are optional. If get_rate is
* NULL, the rate in the struct clk will be used.
*/
struct clkops {
void (*enable) (struct clk *);
void (*disable) (struct clk *);
unsigned long (*get_rate) (struct clk *);
int (*set_parent)(struct clk *, struct clk *);
};
/**
* struct clk - ux500 clock structure
* @ops: pointer to clkops struct used to control this clock
* @name: name, for debugging
* @enabled: refcount. positive if enabled, zero if disabled
* @get_rate: custom callback for getting the clock rate
* @data: custom per-clock data for example for the get_rate
* callback
* @rate: fixed rate for clocks which don't implement
* ops->getrate
* @prcmu_cg_off: address offset of the combined enable/disable register
* (used on u8500v1)
* @prcmu_cg_bit: bit in the combined enable/disable register (used on
* u8500v1)
* @prcmu_cg_mgt: address of the enable/disable register (used on
* u8500ed)
* @cluster: peripheral cluster number
* @prcc_bus: bit for the bus clock in the peripheral's CLKRST
* @prcc_kernel: bit for the kernel clock in the peripheral's CLKRST.
* -1 if no kernel clock exists.
* @parent_cluster: pointer to parent's cluster clk struct
* @parent_periph: pointer to parent's peripheral clk struct
*
* Peripherals are organised into clusters, and each cluster has an associated
* bus clock. Some peripherals also have a parent peripheral clock.
*
* In order to enable a clock for a peripheral, we need to enable:
* (1) the parent cluster (bus) clock at the PRCMU level
* (2) the parent peripheral clock (if any) at the PRCMU level
* (3) the peripheral's bus & kernel clock at the PRCC level
*
* (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each
* of the cluster and peripheral clocks, and hooking these as the parents of
* the individual peripheral clocks.
*
* (3) is handled by specifying the bits in the PRCC control registers required
* to enable these clocks and modifying them in the ->enable and
* ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
*
* This structure describes both the PRCMU-level clocks and PRCC-level clocks.
* The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
* prcc, and parent pointers are only used for the PRCC-level clocks.
*/
struct clk {
const struct clkops *ops;
const char *name;
unsigned int enabled;
unsigned long (*get_rate)(struct clk *);
void *data;
unsigned long rate;
struct list_head list;
/* These three are only for PRCMU clks */
unsigned int prcmu_cg_off;
unsigned int prcmu_cg_bit;
unsigned int prcmu_cg_mgt;
/* The rest are only for PRCC clks */
int cluster;
unsigned int prcc_bus;
unsigned int prcc_kernel;
struct clk *parent_cluster;
struct clk *parent_periph;
#if defined(CONFIG_DEBUG_FS)
struct dentry *dent; /* For visible tree hierarchy */
struct dentry *dent_bus; /* For visible tree hierarchy */
#endif
};
#define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg) \
struct clk clk_##_name = { \
.name = #_name, \
.ops = &clk_prcmu_ops, \
.prcmu_cg_off = _cg_off, \
.prcmu_cg_bit = _cg_bit, \
.prcmu_cg_mgt = PRCM_##_reg##_MGT \
}
#define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate) \
struct clk clk_##_name = { \
.name = #_name, \
.ops = &clk_prcmu_ops, \
.prcmu_cg_off = _cg_off, \
.prcmu_cg_bit = _cg_bit, \
.rate = _rate, \
.prcmu_cg_mgt = PRCM_##_reg##_MGT \
}
#define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk) \
struct clk clk_##_name = { \
.name = #_name, \
.ops = &clk_prcc_ops, \
.cluster = _pclust, \
.prcc_bus = _bus_en, \
.prcc_kernel = _kernel_en, \
.parent_cluster = &clk_per##_pclust##clk, \
.parent_periph = _kernclk \
}
#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
struct clk clk_##_name = { \
.name = #_name, \
.ops = &clk_prcc_ops, \
.cluster = _pclust, \
.prcc_bus = _bus_en, \
.prcc_kernel = _kernel_en, \
.parent_cluster = &clk_per##_pclust##clk, \
.parent_periph = _kernclk, \
.get_rate = _callback, \
.data = (void *) _data \
}
#define CLK(_clk, _devname, _conname) \
{ \
.clk = &clk_##_clk, \
.dev_id = _devname, \
.con_id = _conname, \
}
int __init clk_db8500_ed_fixup(void);
int __init clk_init(void);
#ifdef CONFIG_DEBUG_FS
int clk_debugfs_init(void);
#else
static inline int clk_debugfs_init(void) { return 0; }
#endif
#ifdef CONFIG_CPU_FREQ
int clk_init_smp_twd_cpufreq(void);
#else
static inline int clk_init_smp_twd_cpufreq(void) { return 0; }
#endif
...@@ -8,7 +8,6 @@ ...@@ -8,7 +8,6 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/clk.h>
#include <linux/mfd/db8500-prcmu.h> #include <linux/mfd/db8500-prcmu.h>
#include <linux/clksrc-dbx500-prcmu.h> #include <linux/clksrc-dbx500-prcmu.h>
#include <linux/sys_soc.h> #include <linux/sys_soc.h>
...@@ -17,6 +16,7 @@ ...@@ -17,6 +16,7 @@
#include <linux/stat.h> #include <linux/stat.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/platform_data/clk-ux500.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
...@@ -25,8 +25,6 @@ ...@@ -25,8 +25,6 @@
#include <mach/setup.h> #include <mach/setup.h>
#include <mach/devices.h> #include <mach/devices.h>
#include "clock.h"
void __iomem *_PRCMU_BASE; void __iomem *_PRCMU_BASE;
/* /*
...@@ -70,13 +68,17 @@ void __init ux500_init_irq(void) ...@@ -70,13 +68,17 @@ void __init ux500_init_irq(void)
*/ */
if (cpu_is_u8500_family()) if (cpu_is_u8500_family())
db8500_prcmu_early_init(); db8500_prcmu_early_init();
clk_init();
if (cpu_is_u8500_family())
u8500_clk_init();
else if (cpu_is_u9540())
u9540_clk_init();
else if (cpu_is_u8540())
u8540_clk_init();
} }
void __init ux500_init_late(void) void __init ux500_init_late(void)
{ {
clk_debugfs_init();
clk_init_smp_twd_cpufreq();
} }
static const char * __init ux500_get_machine(void) static const char * __init ux500_get_machine(void)
......
...@@ -15,6 +15,7 @@ ifeq ($(CONFIG_COMMON_CLK), y) ...@@ -15,6 +15,7 @@ ifeq ($(CONFIG_COMMON_CLK), y)
obj-$(CONFIG_ARCH_MMP) += mmp/ obj-$(CONFIG_ARCH_MMP) += mmp/
endif endif
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_ARCH_U8500) += ux500/
# Chip specific # Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
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