Commit ebf7ed1a authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter

drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll()

A part of this function was indented with 2 tabs and 1 space instead of
just 2 tabs. We're going to touch that code, so start by re-indenting
it.
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c5ad54cf
...@@ -1189,69 +1189,69 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */, ...@@ -1189,69 +1189,69 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
if (min_dco_index > 2) { if (min_dco_index > 2) {
WARN(1, "No valid values found for the given pixel clock\n"); WARN(1, "No valid values found for the given pixel clock\n");
} else { } else {
wrpll_params->central_freq = dco_central_freq[min_dco_index]; wrpll_params->central_freq = dco_central_freq[min_dco_index];
switch (dco_central_freq[min_dco_index]) { switch (dco_central_freq[min_dco_index]) {
case 9600000000ULL: case 9600000000ULL:
wrpll_params->central_freq = 0; wrpll_params->central_freq = 0;
break; break;
case 9000000000ULL: case 9000000000ULL:
wrpll_params->central_freq = 1; wrpll_params->central_freq = 1;
break; break;
case 8400000000ULL: case 8400000000ULL:
wrpll_params->central_freq = 3; wrpll_params->central_freq = 3;
} }
switch (candidate_p0[min_dco_index]) { switch (candidate_p0[min_dco_index]) {
case 1: case 1:
wrpll_params->pdiv = 0; wrpll_params->pdiv = 0;
break; break;
case 2: case 2:
wrpll_params->pdiv = 1; wrpll_params->pdiv = 1;
break; break;
case 3: case 3:
wrpll_params->pdiv = 2; wrpll_params->pdiv = 2;
break; break;
case 7: case 7:
wrpll_params->pdiv = 4; wrpll_params->pdiv = 4;
break; break;
default: default:
WARN(1, "Incorrect PDiv\n"); WARN(1, "Incorrect PDiv\n");
} }
switch (candidate_p2[min_dco_index]) { switch (candidate_p2[min_dco_index]) {
case 5: case 5:
wrpll_params->kdiv = 0; wrpll_params->kdiv = 0;
break; break;
case 2: case 2:
wrpll_params->kdiv = 1; wrpll_params->kdiv = 1;
break; break;
case 3: case 3:
wrpll_params->kdiv = 2; wrpll_params->kdiv = 2;
break; break;
case 1: case 1:
wrpll_params->kdiv = 3; wrpll_params->kdiv = 3;
break; break;
default: default:
WARN(1, "Incorrect KDiv\n"); WARN(1, "Incorrect KDiv\n");
} }
wrpll_params->qdiv_ratio = candidate_p1[min_dco_index]; wrpll_params->qdiv_ratio = candidate_p1[min_dco_index];
wrpll_params->qdiv_mode = wrpll_params->qdiv_mode =
(wrpll_params->qdiv_ratio == 1) ? 0 : 1; (wrpll_params->qdiv_ratio == 1) ? 0 : 1;
dco_freq = candidate_p0[min_dco_index] * dco_freq = candidate_p0[min_dco_index] *
candidate_p1[min_dco_index] * candidate_p1[min_dco_index] *
candidate_p2[min_dco_index] * afe_clock; candidate_p2[min_dco_index] * afe_clock;
/* /*
* Intermediate values are in Hz. * Intermediate values are in Hz.
* Divide by MHz to match bsepc * Divide by MHz to match bsepc
*/ */
wrpll_params->dco_integer = div_u64(dco_freq, (24 * MHz(1))); wrpll_params->dco_integer = div_u64(dco_freq, (24 * MHz(1)));
wrpll_params->dco_fraction = wrpll_params->dco_fraction =
div_u64(((div_u64(dco_freq, 24) - div_u64(((div_u64(dco_freq, 24) -
wrpll_params->dco_integer * MHz(1)) * 0x8000), MHz(1)); wrpll_params->dco_integer * MHz(1)) * 0x8000), MHz(1));
} }
} }
......
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