Commit ebf89ed7 authored by Suman Anna's avatar Suman Anna Committed by Tony Lindgren

ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks

The commit 5390130f ("ARM: dts: dra7: add timer_sys_ck entries
for IPU/DSP timers") was added to allow the OMAP clocksource timer
driver to use the clock aliases when reconfiguring the parent clock
source for the timer functional clocks after the timer_sys_ck clock
aliases got cleaned up in commit a8202cd5 ("clk: ti: dra7: drop
unnecessary clock aliases").

The above patch however has missed adding the entries for couple of
timers (14, 15 and 16), and also added erroneously in the parent
ti-sysc nodes for couple of clocks (timers 4, 5 and 6). Fix these
properly, so that any of these timers can be used with OMAP remoteproc
IPU and DSP devices. The always-on timers 1 and 12 are not expected
to use this clock source, so they are not modified.

Fixes: 5390130f ("ARM: dts: dra7: add timer_sys_ck entries for IPU/DSP timers")
Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 6a9110f9
......@@ -1210,9 +1210,8 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): l4per_pwrdm, l4per_clkdm */
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x36000 0x1000>;
......@@ -3355,8 +3354,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20000 0x1000>;
......@@ -3364,8 +3363,8 @@ target-module@20000 { /* 0x48820000, ap 5 08.0 */
timer5: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3382,9 +3381,8 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
<SYSC_IDLE_SMART>,
<SYSC_IDLE_SMART_WKUP>;
/* Domains (P, C): ipu_pwrdm, ipu_clkdm */
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,
<&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x22000 0x1000>;
......@@ -3392,8 +3390,8 @@ target-module@22000 { /* 0x48822000, ap 7 24.0 */
timer6: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>;
clock-names = "fck";
clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
};
......@@ -3501,8 +3499,8 @@ target-module@2a000 { /* 0x4882a000, ap 15 10.0 */
timer14: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
......@@ -3529,8 +3527,8 @@ target-module@2c000 { /* 0x4882c000, ap 17 02.0 */
timer15: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
......@@ -3557,8 +3555,8 @@ target-module@2e000 { /* 0x4882e000, ap 19 14.0 */
timer16: timer@0 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x80>;
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;
clock-names = "fck";
clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>, <&timer_sys_clk_div>;
clock-names = "fck", "timer_sys_ck";
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
};
......
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