Commit ec13e9b6 authored by Suresh Warrier's avatar Suresh Warrier Committed by Paul Mackerras

powerpc/xics: Add icp_native_cause_ipi_rm

Function to cause an IPI by directly updating the MFFR register
in the XICS. The function is meant for real-mode callers since
they cannot use the smp_ops->cause_ipi function which uses an
ioremapped address.

Normal usage is for the the KVM real mode code to set the IPI message
using smp_muxed_ipi_message_pass and then invoke icp_native_cause_ipi_rm
to cause the actual IPI.

The function requires kvm_hstate.xics_phys to have been initialized
with the physical address of XICS.
Signed-off-by: default avatarSuresh Warrier <warrier@linux.vnet.ibm.com>
Acked-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 31639c77
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#ifdef CONFIG_PPC_ICP_NATIVE #ifdef CONFIG_PPC_ICP_NATIVE
extern int icp_native_init(void); extern int icp_native_init(void);
extern void icp_native_flush_interrupt(void); extern void icp_native_flush_interrupt(void);
extern void icp_native_cause_ipi_rm(int cpu);
#else #else
static inline int icp_native_init(void) { return -ENODEV; } static inline int icp_native_init(void) { return -ENODEV; }
#endif #endif
......
...@@ -159,6 +159,27 @@ static void icp_native_cause_ipi(int cpu, unsigned long data) ...@@ -159,6 +159,27 @@ static void icp_native_cause_ipi(int cpu, unsigned long data)
icp_native_set_qirr(cpu, IPI_PRIORITY); icp_native_set_qirr(cpu, IPI_PRIORITY);
} }
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
void icp_native_cause_ipi_rm(int cpu)
{
/*
* Currently not used to send IPIs to another CPU
* on the same core. Only caller is KVM real mode.
* Need the physical address of the XICS to be
* previously saved in kvm_hstate in the paca.
*/
unsigned long xics_phys;
/*
* Just like the cause_ipi functions, it is required to
* include a full barrier (out8 includes a sync) before
* causing the IPI.
*/
xics_phys = paca[cpu].kvm_hstate.xics_phys;
out_rm8((u8 *)(xics_phys + XICS_MFRR), IPI_PRIORITY);
}
#endif
/* /*
* Called when an interrupt is received on an off-line CPU to * Called when an interrupt is received on an off-line CPU to
* clear the interrupt, so that the CPU can go back to nap mode. * clear the interrupt, so that the CPU can go back to nap mode.
......
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