Commit ed2562c6 authored by V sujith kumar Reddy's avatar V sujith kumar Reddy Committed by Mark Brown

ASoC: SOF: Adding amd HS functionality to the sof core

Add I2S HS control instance to the sof core.
This will help the amd topology to use the I2S HS Dai.
Signed-off-by: default avatarV sujith kumar Reddy <Vsujithkumar.Reddy@amd.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220913144319.1055302-4-Vsujithkumar.Reddy@amd.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 41cb85bc
......@@ -84,6 +84,7 @@ enum sof_ipc_dai_type {
SOF_DAI_AMD_BT, /**< AMD ACP BT*/
SOF_DAI_AMD_SP, /**< AMD ACP SP */
SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */
SOF_DAI_AMD_HS, /**< Amd HS */
SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */
};
......@@ -112,6 +113,7 @@ struct sof_ipc_dai_config {
struct sof_ipc_dai_acp_params acpbt;
struct sof_ipc_dai_acp_params acpsp;
struct sof_ipc_dai_acpdmic_params acpdmic;
struct sof_ipc_dai_acp_params acphs;
struct sof_ipc_dai_mtk_afe_params afe;
};
} __packed;
......
......@@ -346,6 +346,15 @@ static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
dev_dbg(component->dev, "AMD_SP channels_min: %d channels_max: %d\n",
channels->min, channels->max);
break;
case SOF_DAI_AMD_HS:
rate->min = private->dai_config->acphs.fsync_rate;
rate->max = private->dai_config->acphs.fsync_rate;
channels->min = private->dai_config->acphs.tdm_slots;
channels->max = private->dai_config->acphs.tdm_slots;
dev_dbg(component->dev,
"AMD_HS channel_max: %d rate_max: %d\n", channels->max, rate->max);
break;
case SOF_DAI_AMD_DMIC:
rate->min = private->dai_config->acpdmic.pdm_rate;
rate->max = private->dai_config->acpdmic.pdm_rate;
......
......@@ -1217,6 +1217,36 @@ static int sof_link_acp_sp_load(struct snd_soc_component *scomp, struct snd_sof_
return 0;
}
static int sof_link_acp_hs_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink,
struct sof_ipc_dai_config *config, struct snd_sof_dai *dai)
{
struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
struct sof_dai_private_data *private = dai->private;
u32 size = sizeof(*config);
/* Configures the DAI hardware format and inverted clocks */
sof_dai_set_format(hw_config, config);
/* init IPC */
memset(&config->acphs, 0, sizeof(config->acphs));
config->hdr.size = size;
config->acphs.fsync_rate = le32_to_cpu(hw_config->fsync_rate);
config->acphs.tdm_slots = le32_to_cpu(hw_config->tdm_slots);
dev_info(scomp->dev, "ACP_HS config ACP%d channel %d rate %d\n",
config->dai_index, config->acphs.tdm_slots,
config->acphs.fsync_rate);
dai->number_configs = 1;
dai->current_config = 0;
private->dai_config = kmemdup(config, size, GFP_KERNEL);
if (!private->dai_config)
return -ENOMEM;
return 0;
}
static int sof_link_afe_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink,
struct sof_ipc_dai_config *config, struct snd_sof_dai *dai)
{
......@@ -1517,6 +1547,9 @@ static int sof_ipc3_widget_setup_comp_dai(struct snd_sof_widget *swidget)
case SOF_DAI_AMD_SP:
ret = sof_link_acp_sp_load(scomp, slink, config, dai);
break;
case SOF_DAI_AMD_HS:
ret = sof_link_acp_hs_load(scomp, slink, config, dai);
break;
case SOF_DAI_AMD_DMIC:
ret = sof_link_acp_dmic_load(scomp, slink, config, dai);
break;
......
......@@ -287,6 +287,7 @@ static const struct sof_dai_types sof_dais[] = {
{"ACP", SOF_DAI_AMD_BT},
{"ACPSP", SOF_DAI_AMD_SP},
{"ACPDMIC", SOF_DAI_AMD_DMIC},
{"ACPHS", SOF_DAI_AMD_HS},
{"AFE", SOF_DAI_MEDIATEK_AFE},
};
......
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