Commit ed645eee authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: s/init_cdclk/init_cdclk_hw/

Give the cdclk init/uninit functions a _hw suffix to make
it clear they are about initializing the actual hardware.
I'll be wanting to to add a intel_cdclk_init() which is
purely initializing software structures.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-12-ville.syrjala@linux.intel.comReviewed-by: default avatarImre Deak <imre.deak@intel.com>
parent 4c029c49
...@@ -1134,7 +1134,7 @@ static void skl_sanitize_cdclk(struct drm_i915_private *dev_priv) ...@@ -1134,7 +1134,7 @@ static void skl_sanitize_cdclk(struct drm_i915_private *dev_priv)
dev_priv->cdclk.hw.vco = -1; dev_priv->cdclk.hw.vco = -1;
} }
static void skl_init_cdclk(struct drm_i915_private *dev_priv) static void skl_cdclk_init_hw(struct drm_i915_private *dev_priv)
{ {
struct intel_cdclk_config cdclk_config; struct intel_cdclk_config cdclk_config;
...@@ -1163,7 +1163,7 @@ static void skl_init_cdclk(struct drm_i915_private *dev_priv) ...@@ -1163,7 +1163,7 @@ static void skl_init_cdclk(struct drm_i915_private *dev_priv)
skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE); skl_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE);
} }
static void skl_uninit_cdclk(struct drm_i915_private *dev_priv) static void skl_cdclk_uninit_hw(struct drm_i915_private *dev_priv)
{ {
struct intel_cdclk_config cdclk_config = dev_priv->cdclk.hw; struct intel_cdclk_config cdclk_config = dev_priv->cdclk.hw;
...@@ -1697,7 +1697,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv) ...@@ -1697,7 +1697,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
dev_priv->cdclk.hw.vco = -1; dev_priv->cdclk.hw.vco = -1;
} }
static void bxt_init_cdclk(struct drm_i915_private *dev_priv) static void bxt_cdclk_init_hw(struct drm_i915_private *dev_priv)
{ {
struct intel_cdclk_config cdclk_config; struct intel_cdclk_config cdclk_config;
...@@ -1722,7 +1722,7 @@ static void bxt_init_cdclk(struct drm_i915_private *dev_priv) ...@@ -1722,7 +1722,7 @@ static void bxt_init_cdclk(struct drm_i915_private *dev_priv)
bxt_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE); bxt_set_cdclk(dev_priv, &cdclk_config, INVALID_PIPE);
} }
static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv) static void bxt_cdclk_uninit_hw(struct drm_i915_private *dev_priv)
{ {
struct intel_cdclk_config cdclk_config = dev_priv->cdclk.hw; struct intel_cdclk_config cdclk_config = dev_priv->cdclk.hw;
...@@ -1735,7 +1735,7 @@ static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv) ...@@ -1735,7 +1735,7 @@ static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
} }
/** /**
* intel_cdclk_init - Initialize CDCLK * intel_cdclk_init_hw - Initialize CDCLK hardware
* @i915: i915 device * @i915: i915 device
* *
* Initialize CDCLK. This consists mainly of initializing dev_priv->cdclk.hw and * Initialize CDCLK. This consists mainly of initializing dev_priv->cdclk.hw and
...@@ -1743,27 +1743,27 @@ static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv) ...@@ -1743,27 +1743,27 @@ static void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
* during the display core initialization sequence, after which the DMC will * during the display core initialization sequence, after which the DMC will
* take care of turning CDCLK off/on as needed. * take care of turning CDCLK off/on as needed.
*/ */
void intel_cdclk_init(struct drm_i915_private *i915) void intel_cdclk_init_hw(struct drm_i915_private *i915)
{ {
if (IS_GEN9_LP(i915) || INTEL_GEN(i915) >= 10) if (IS_GEN9_LP(i915) || INTEL_GEN(i915) >= 10)
bxt_init_cdclk(i915); bxt_cdclk_init_hw(i915);
else if (IS_GEN9_BC(i915)) else if (IS_GEN9_BC(i915))
skl_init_cdclk(i915); skl_cdclk_init_hw(i915);
} }
/** /**
* intel_cdclk_uninit - Uninitialize CDCLK * intel_cdclk_uninit_hw - Uninitialize CDCLK hardware
* @i915: i915 device * @i915: i915 device
* *
* Uninitialize CDCLK. This is done only during the display core * Uninitialize CDCLK. This is done only during the display core
* uninitialization sequence. * uninitialization sequence.
*/ */
void intel_cdclk_uninit(struct drm_i915_private *i915) void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
{ {
if (INTEL_GEN(i915) >= 10 || IS_GEN9_LP(i915)) if (INTEL_GEN(i915) >= 10 || IS_GEN9_LP(i915))
bxt_uninit_cdclk(i915); bxt_cdclk_uninit_hw(i915);
else if (IS_GEN9_BC(i915)) else if (IS_GEN9_BC(i915))
skl_uninit_cdclk(i915); skl_cdclk_uninit_hw(i915);
} }
/** /**
......
...@@ -23,8 +23,8 @@ struct intel_cdclk_vals { ...@@ -23,8 +23,8 @@ struct intel_cdclk_vals {
}; };
int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state); int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
void intel_cdclk_init(struct drm_i915_private *i915); void intel_cdclk_init_hw(struct drm_i915_private *i915);
void intel_cdclk_uninit(struct drm_i915_private *i915); void intel_cdclk_uninit_hw(struct drm_i915_private *i915);
void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv); void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
void intel_update_max_cdclk(struct drm_i915_private *dev_priv); void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv); void intel_update_cdclk(struct drm_i915_private *dev_priv);
......
...@@ -4800,7 +4800,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv, ...@@ -4800,7 +4800,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
mutex_unlock(&power_domains->lock); mutex_unlock(&power_domains->lock);
intel_cdclk_init(dev_priv); intel_cdclk_init_hw(dev_priv);
gen9_dbuf_enable(dev_priv); gen9_dbuf_enable(dev_priv);
...@@ -4817,7 +4817,7 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) ...@@ -4817,7 +4817,7 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv); gen9_dbuf_disable(dev_priv);
intel_cdclk_uninit(dev_priv); intel_cdclk_uninit_hw(dev_priv);
/* The spec doesn't call for removing the reset handshake flag */ /* The spec doesn't call for removing the reset handshake flag */
/* disable PG1 and Misc I/O */ /* disable PG1 and Misc I/O */
...@@ -4861,7 +4861,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume ...@@ -4861,7 +4861,7 @@ static void bxt_display_core_init(struct drm_i915_private *dev_priv, bool resume
mutex_unlock(&power_domains->lock); mutex_unlock(&power_domains->lock);
intel_cdclk_init(dev_priv); intel_cdclk_init_hw(dev_priv);
gen9_dbuf_enable(dev_priv); gen9_dbuf_enable(dev_priv);
...@@ -4878,7 +4878,7 @@ static void bxt_display_core_uninit(struct drm_i915_private *dev_priv) ...@@ -4878,7 +4878,7 @@ static void bxt_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv); gen9_dbuf_disable(dev_priv);
intel_cdclk_uninit(dev_priv); intel_cdclk_uninit_hw(dev_priv);
/* The spec doesn't call for removing the reset handshake flag */ /* The spec doesn't call for removing the reset handshake flag */
...@@ -4920,7 +4920,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume ...@@ -4920,7 +4920,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
mutex_unlock(&power_domains->lock); mutex_unlock(&power_domains->lock);
/* 5. Enable CD clock */ /* 5. Enable CD clock */
intel_cdclk_init(dev_priv); intel_cdclk_init_hw(dev_priv);
/* 6. Enable DBUF */ /* 6. Enable DBUF */
gen9_dbuf_enable(dev_priv); gen9_dbuf_enable(dev_priv);
...@@ -4942,7 +4942,7 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) ...@@ -4942,7 +4942,7 @@ static void cnl_display_core_uninit(struct drm_i915_private *dev_priv)
gen9_dbuf_disable(dev_priv); gen9_dbuf_disable(dev_priv);
/* 3. Disable CD clock */ /* 3. Disable CD clock */
intel_cdclk_uninit(dev_priv); intel_cdclk_uninit_hw(dev_priv);
/* /*
* 4. Disable Power Well 1 (PG1). * 4. Disable Power Well 1 (PG1).
...@@ -5037,7 +5037,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, ...@@ -5037,7 +5037,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
mutex_unlock(&power_domains->lock); mutex_unlock(&power_domains->lock);
/* 4. Enable CDCLK. */ /* 4. Enable CDCLK. */
intel_cdclk_init(dev_priv); intel_cdclk_init_hw(dev_priv);
/* 5. Enable DBUF. */ /* 5. Enable DBUF. */
icl_dbuf_enable(dev_priv); icl_dbuf_enable(dev_priv);
...@@ -5066,7 +5066,7 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv) ...@@ -5066,7 +5066,7 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv)
icl_dbuf_disable(dev_priv); icl_dbuf_disable(dev_priv);
/* 3. Disable CD clock */ /* 3. Disable CD clock */
intel_cdclk_uninit(dev_priv); intel_cdclk_uninit_hw(dev_priv);
/* /*
* 4. Disable Power Well 1 (PG1). * 4. Disable Power Well 1 (PG1).
......
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