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Kirill Smelkov
linux
Commits
ed827021
Commit
ed827021
authored
May 08, 2010
by
Ingo Molnar
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Merge branch 'perf' of
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux-2.6
into perf/core
parents
4d1c52b0
1cf4a063
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18 additions
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4 deletions
+18
-4
tools/perf/Documentation/perf-list.txt
tools/perf/Documentation/perf-list.txt
+16
-3
tools/perf/util/parse-events.c
tools/perf/util/parse-events.c
+2
-1
No files found.
tools/perf/Documentation/perf-list.txt
View file @
ed827021
...
@@ -18,8 +18,16 @@ various perf commands with the -e option.
...
@@ -18,8 +18,16 @@ various perf commands with the -e option.
RAW HARDWARE EVENT DESCRIPTOR
RAW HARDWARE EVENT DESCRIPTOR
-----------------------------
-----------------------------
Even when an event is not available in a symbolic form within perf right now,
Even when an event is not available in a symbolic form within perf right now,
it can be encoded as <UMASK VALUE><EVENT NUM>, for instance, if the Intel docs
it can be encoded in a per processor specific way.
describe an event as:
For instance For x86 CPUs NNN represents the raw register encoding with the
layout of IA32_PERFEVTSELx MSRs (see [Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide] Figure 30-1 Layout
of IA32_PERFEVTSELx MSRs) or AMD's PerfEvtSeln (see [AMD64 Architecture Programmer’s Manual Volume 2: System Programming], Page 344,
Figure 13-7 Performance Event-Select Register (PerfEvtSeln)).
Example:
If the Intel docs for a QM720 Core i7 describe an event as:
Event Umask Event Mask
Event Umask Event Mask
Num. Value Mnemonic Description Comment
Num. Value Mnemonic Description Comment
...
@@ -33,6 +41,9 @@ raw encoding of 0x1A8 can be used:
...
@@ -33,6 +41,9 @@ raw encoding of 0x1A8 can be used:
perf stat -e r1a8 -a sleep 1
perf stat -e r1a8 -a sleep 1
perf record -e r1a8 ...
perf record -e r1a8 ...
You should refer to the processor specific documentation for getting these
details. Some of them are referenced in the SEE ALSO section below.
OPTIONS
OPTIONS
-------
-------
None
None
...
@@ -40,4 +51,6 @@ None
...
@@ -40,4 +51,6 @@ None
SEE ALSO
SEE ALSO
--------
--------
linkperf:perf-stat[1], linkperf:perf-top[1],
linkperf:perf-stat[1], linkperf:perf-top[1],
linkperf:perf-record[1]
linkperf:perf-record[1],
http://www.intel.com/Assets/PDF/manual/253669.pdf[Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide],
http://support.amd.com/us/Processor_TechDocs/24593.pdf[AMD64 Architecture Programmer’s Manual Volume 2: System Programming]
tools/perf/util/parse-events.c
View file @
ed827021
...
@@ -943,7 +943,8 @@ void print_events(void)
...
@@ -943,7 +943,8 @@ void print_events(void)
printf
(
"
\n
"
);
printf
(
"
\n
"
);
printf
(
" %-42s [%s]
\n
"
,
printf
(
" %-42s [%s]
\n
"
,
"rNNN (NNN=<UMASK VALUE><EVENT NUM>)"
,
event_type_descriptors
[
PERF_TYPE_RAW
]);
"rNNN (see 'perf list --help' on how to encode it)"
,
event_type_descriptors
[
PERF_TYPE_RAW
]);
printf
(
"
\n
"
);
printf
(
"
\n
"
);
printf
(
" %-42s [%s]
\n
"
,
printf
(
" %-42s [%s]
\n
"
,
...
...
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