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Kirill Smelkov
linux
Commits
ed828666
Commit
ed828666
authored
Nov 16, 2016
by
Ben Skeggs
Browse files
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Browse Files
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Email Patches
Plain Diff
drm/nouveau/disp/gp102: rename from gp104
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
a4fa851c
Changes
14
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Showing
14 changed files
with
46 additions
and
46 deletions
+46
-46
drivers/gpu/drm/nouveau/include/nvif/class.h
drivers/gpu/drm/nouveau/include/nvif/class.h
+2
-2
drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
+1
-1
drivers/gpu/drm/nouveau/nouveau_display.c
drivers/gpu/drm/nouveau/nouveau_display.c
+1
-1
drivers/gpu/drm/nouveau/nv50_display.c
drivers/gpu/drm/nouveau/nv50_display.c
+1
-1
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+2
-2
drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
+6
-6
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
+2
-2
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c
+6
-6
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c
+3
-3
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
+4
-4
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
+6
-6
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c
+2
-2
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
+9
-9
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
+1
-1
No files found.
drivers/gpu/drm/nouveau/include/nvif/class.h
View file @
ed828666
...
@@ -52,7 +52,7 @@
...
@@ -52,7 +52,7 @@
#define GM107_DISP
/* cl5070.h */
0x00009470
#define GM107_DISP
/* cl5070.h */
0x00009470
#define GM200_DISP
/* cl5070.h */
0x00009570
#define GM200_DISP
/* cl5070.h */
0x00009570
#define GP100_DISP
/* cl5070.h */
0x00009770
#define GP100_DISP
/* cl5070.h */
0x00009770
#define GP10
4
_DISP
/* cl5070.h */
0x00009870
#define GP10
2
_DISP
/* cl5070.h */
0x00009870
#define NV31_MPEG 0x00003174
#define NV31_MPEG 0x00003174
#define G82_MPEG 0x00008274
#define G82_MPEG 0x00008274
...
@@ -90,7 +90,7 @@
...
@@ -90,7 +90,7 @@
#define GM107_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000947d
#define GM107_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000947d
#define GM200_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000957d
#define GM200_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000957d
#define GP100_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000977d
#define GP100_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000977d
#define GP10
4
_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000987d
#define GP10
2
_DISP_CORE_CHANNEL_DMA
/* cl507d.h */
0x0000987d
#define NV50_DISP_OVERLAY_CHANNEL_DMA
/* cl507e.h */
0x0000507e
#define NV50_DISP_OVERLAY_CHANNEL_DMA
/* cl507e.h */
0x0000507e
#define G82_DISP_OVERLAY_CHANNEL_DMA
/* cl507e.h */
0x0000827e
#define G82_DISP_OVERLAY_CHANNEL_DMA
/* cl507e.h */
0x0000827e
...
...
drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
View file @
ed828666
...
@@ -33,5 +33,5 @@ int gk110_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
...
@@ -33,5 +33,5 @@ int gk110_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
int
gm107_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gm107_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gm200_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gm200_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gp100_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gp100_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gp10
4
_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
int
gp10
2
_disp_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_disp
**
);
#endif
#endif
drivers/gpu/drm/nouveau/nouveau_display.c
View file @
ed828666
...
@@ -538,7 +538,7 @@ nouveau_display_create(struct drm_device *dev)
...
@@ -538,7 +538,7 @@ nouveau_display_create(struct drm_device *dev)
if
(
nouveau_modeset
!=
2
&&
drm
->
vbios
.
dcb
.
entries
)
{
if
(
nouveau_modeset
!=
2
&&
drm
->
vbios
.
dcb
.
entries
)
{
static
const
u16
oclass
[]
=
{
static
const
u16
oclass
[]
=
{
GP10
4
_DISP
,
GP10
2
_DISP
,
GP100_DISP
,
GP100_DISP
,
GM200_DISP
,
GM200_DISP
,
GM107_DISP
,
GM107_DISP
,
...
...
drivers/gpu/drm/nouveau/nv50_display.c
View file @
ed828666
...
@@ -574,7 +574,7 @@ nv50_core_create(struct nvif_device *device, struct nvif_object *disp,
...
@@ -574,7 +574,7 @@ nv50_core_create(struct nvif_device *device, struct nvif_object *disp,
.
pushbuf
=
0xb0007d00
,
.
pushbuf
=
0xb0007d00
,
};
};
static
const
s32
oclass
[]
=
{
static
const
s32
oclass
[]
=
{
GP10
4
_DISP_CORE_CHANNEL_DMA
,
GP10
2
_DISP_CORE_CHANNEL_DMA
,
GP100_DISP_CORE_CHANNEL_DMA
,
GP100_DISP_CORE_CHANNEL_DMA
,
GM200_DISP_CORE_CHANNEL_DMA
,
GM200_DISP_CORE_CHANNEL_DMA
,
GM107_DISP_CORE_CHANNEL_DMA
,
GM107_DISP_CORE_CHANNEL_DMA
,
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View file @
ed828666
...
@@ -2207,7 +2207,7 @@ nv132_chipset = {
...
@@ -2207,7 +2207,7 @@ nv132_chipset = {
.
ce
[
1
]
=
gp102_ce_new
,
.
ce
[
1
]
=
gp102_ce_new
,
.
ce
[
2
]
=
gp102_ce_new
,
.
ce
[
2
]
=
gp102_ce_new
,
.
ce
[
3
]
=
gp102_ce_new
,
.
ce
[
3
]
=
gp102_ce_new
,
.
disp
=
gp10
4
_disp_new
,
.
disp
=
gp10
2
_disp_new
,
.
dma
=
gf119_dma_new
,
.
dma
=
gf119_dma_new
,
.
fifo
=
gp100_fifo_new
,
.
fifo
=
gp100_fifo_new
,
};
};
...
@@ -2236,7 +2236,7 @@ nv134_chipset = {
...
@@ -2236,7 +2236,7 @@ nv134_chipset = {
.
ce
[
1
]
=
gp102_ce_new
,
.
ce
[
1
]
=
gp102_ce_new
,
.
ce
[
2
]
=
gp102_ce_new
,
.
ce
[
2
]
=
gp102_ce_new
,
.
ce
[
3
]
=
gp102_ce_new
,
.
ce
[
3
]
=
gp102_ce_new
,
.
disp
=
gp10
4
_disp_new
,
.
disp
=
gp10
2
_disp_new
,
.
dma
=
gf119_dma_new
,
.
dma
=
gf119_dma_new
,
.
fifo
=
gp100_fifo_new
,
.
fifo
=
gp100_fifo_new
,
};
};
...
...
drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
View file @
ed828666
...
@@ -11,7 +11,7 @@ nvkm-y += nvkm/engine/disp/gk110.o
...
@@ -11,7 +11,7 @@ nvkm-y += nvkm/engine/disp/gk110.o
nvkm-y += nvkm/engine/disp/gm107.o
nvkm-y += nvkm/engine/disp/gm107.o
nvkm-y += nvkm/engine/disp/gm200.o
nvkm-y += nvkm/engine/disp/gm200.o
nvkm-y += nvkm/engine/disp/gp100.o
nvkm-y += nvkm/engine/disp/gp100.o
nvkm-y += nvkm/engine/disp/gp10
4
.o
nvkm-y += nvkm/engine/disp/gp10
2
.o
nvkm-y += nvkm/engine/disp/outp.o
nvkm-y += nvkm/engine/disp/outp.o
nvkm-y += nvkm/engine/disp/outpdp.o
nvkm-y += nvkm/engine/disp/outpdp.o
...
@@ -48,14 +48,14 @@ nvkm-y += nvkm/engine/disp/rootgk110.o
...
@@ -48,14 +48,14 @@ nvkm-y += nvkm/engine/disp/rootgk110.o
nvkm-y += nvkm/engine/disp/rootgm107.o
nvkm-y += nvkm/engine/disp/rootgm107.o
nvkm-y += nvkm/engine/disp/rootgm200.o
nvkm-y += nvkm/engine/disp/rootgm200.o
nvkm-y += nvkm/engine/disp/rootgp100.o
nvkm-y += nvkm/engine/disp/rootgp100.o
nvkm-y += nvkm/engine/disp/rootgp10
4
.o
nvkm-y += nvkm/engine/disp/rootgp10
2
.o
nvkm-y += nvkm/engine/disp/channv50.o
nvkm-y += nvkm/engine/disp/channv50.o
nvkm-y += nvkm/engine/disp/changf119.o
nvkm-y += nvkm/engine/disp/changf119.o
nvkm-y += nvkm/engine/disp/dmacnv50.o
nvkm-y += nvkm/engine/disp/dmacnv50.o
nvkm-y += nvkm/engine/disp/dmacgf119.o
nvkm-y += nvkm/engine/disp/dmacgf119.o
nvkm-y += nvkm/engine/disp/dmacgp10
4
.o
nvkm-y += nvkm/engine/disp/dmacgp10
2
.o
nvkm-y += nvkm/engine/disp/basenv50.o
nvkm-y += nvkm/engine/disp/basenv50.o
nvkm-y += nvkm/engine/disp/baseg84.o
nvkm-y += nvkm/engine/disp/baseg84.o
...
@@ -64,7 +64,7 @@ nvkm-y += nvkm/engine/disp/basegt215.o
...
@@ -64,7 +64,7 @@ nvkm-y += nvkm/engine/disp/basegt215.o
nvkm-y += nvkm/engine/disp/basegf119.o
nvkm-y += nvkm/engine/disp/basegf119.o
nvkm-y += nvkm/engine/disp/basegk104.o
nvkm-y += nvkm/engine/disp/basegk104.o
nvkm-y += nvkm/engine/disp/basegk110.o
nvkm-y += nvkm/engine/disp/basegk110.o
nvkm-y += nvkm/engine/disp/basegp10
4
.o
nvkm-y += nvkm/engine/disp/basegp10
2
.o
nvkm-y += nvkm/engine/disp/corenv50.o
nvkm-y += nvkm/engine/disp/corenv50.o
nvkm-y += nvkm/engine/disp/coreg84.o
nvkm-y += nvkm/engine/disp/coreg84.o
...
@@ -77,7 +77,7 @@ nvkm-y += nvkm/engine/disp/coregk110.o
...
@@ -77,7 +77,7 @@ nvkm-y += nvkm/engine/disp/coregk110.o
nvkm-y += nvkm/engine/disp/coregm107.o
nvkm-y += nvkm/engine/disp/coregm107.o
nvkm-y += nvkm/engine/disp/coregm200.o
nvkm-y += nvkm/engine/disp/coregm200.o
nvkm-y += nvkm/engine/disp/coregp100.o
nvkm-y += nvkm/engine/disp/coregp100.o
nvkm-y += nvkm/engine/disp/coregp10
4
.o
nvkm-y += nvkm/engine/disp/coregp10
2
.o
nvkm-y += nvkm/engine/disp/ovlynv50.o
nvkm-y += nvkm/engine/disp/ovlynv50.o
nvkm-y += nvkm/engine/disp/ovlyg84.o
nvkm-y += nvkm/engine/disp/ovlyg84.o
...
@@ -85,7 +85,7 @@ nvkm-y += nvkm/engine/disp/ovlygt200.o
...
@@ -85,7 +85,7 @@ nvkm-y += nvkm/engine/disp/ovlygt200.o
nvkm-y += nvkm/engine/disp/ovlygt215.o
nvkm-y += nvkm/engine/disp/ovlygt215.o
nvkm-y += nvkm/engine/disp/ovlygf119.o
nvkm-y += nvkm/engine/disp/ovlygf119.o
nvkm-y += nvkm/engine/disp/ovlygk104.o
nvkm-y += nvkm/engine/disp/ovlygk104.o
nvkm-y += nvkm/engine/disp/ovlygp10
4
.o
nvkm-y += nvkm/engine/disp/ovlygp10
2
.o
nvkm-y += nvkm/engine/disp/piocnv50.o
nvkm-y += nvkm/engine/disp/piocnv50.o
nvkm-y += nvkm/engine/disp/piocgf119.o
nvkm-y += nvkm/engine/disp/piocgf119.o
...
...
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp10
2
.c
View file @
ed828666
...
@@ -27,12 +27,12 @@
...
@@ -27,12 +27,12 @@
#include <nvif/class.h>
#include <nvif/class.h>
const
struct
nv50_disp_dmac_oclass
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_base_oclass
=
{
gp10
2
_disp_base_oclass
=
{
.
base
.
oclass
=
GK110_DISP_BASE_CHANNEL_DMA
,
.
base
.
oclass
=
GK110_DISP_BASE_CHANNEL_DMA
,
.
base
.
minver
=
0
,
.
base
.
minver
=
0
,
.
base
.
maxver
=
0
,
.
base
.
maxver
=
0
,
.
ctor
=
nv50_disp_base_new
,
.
ctor
=
nv50_disp_base_new
,
.
func
=
&
gp10
4
_disp_dmac_func
,
.
func
=
&
gp10
2
_disp_dmac_func
,
.
mthd
=
&
gf119_disp_base_chan_mthd
,
.
mthd
=
&
gf119_disp_base_chan_mthd
,
.
chid
=
1
,
.
chid
=
1
,
};
};
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp10
2
.c
View file @
ed828666
...
@@ -29,7 +29,7 @@
...
@@ -29,7 +29,7 @@
#include <nvif/class.h>
#include <nvif/class.h>
static
int
static
int
gp10
4
_disp_core_init
(
struct
nv50_disp_dmac
*
chan
)
gp10
2
_disp_core_init
(
struct
nv50_disp_dmac
*
chan
)
{
{
struct
nv50_disp
*
disp
=
chan
->
base
.
root
->
disp
;
struct
nv50_disp
*
disp
=
chan
->
base
.
root
->
disp
;
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
...
@@ -60,19 +60,19 @@ gp104_disp_core_init(struct nv50_disp_dmac *chan)
...
@@ -60,19 +60,19 @@ gp104_disp_core_init(struct nv50_disp_dmac *chan)
}
}
static
const
struct
nv50_disp_dmac_func
static
const
struct
nv50_disp_dmac_func
gp10
4
_disp_core_func
=
{
gp10
2
_disp_core_func
=
{
.
init
=
gp10
4
_disp_core_init
,
.
init
=
gp10
2
_disp_core_init
,
.
fini
=
gf119_disp_core_fini
,
.
fini
=
gf119_disp_core_fini
,
.
bind
=
gf119_disp_dmac_bind
,
.
bind
=
gf119_disp_dmac_bind
,
};
};
const
struct
nv50_disp_dmac_oclass
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_core_oclass
=
{
gp10
2
_disp_core_oclass
=
{
.
base
.
oclass
=
GP10
4
_DISP_CORE_CHANNEL_DMA
,
.
base
.
oclass
=
GP10
2
_DISP_CORE_CHANNEL_DMA
,
.
base
.
minver
=
0
,
.
base
.
minver
=
0
,
.
base
.
maxver
=
0
,
.
base
.
maxver
=
0
,
.
ctor
=
nv50_disp_core_new
,
.
ctor
=
nv50_disp_core_new
,
.
func
=
&
gp10
4
_disp_core_func
,
.
func
=
&
gp10
2
_disp_core_func
,
.
mthd
=
&
gk104_disp_core_chan_mthd
,
.
mthd
=
&
gk104_disp_core_chan_mthd
,
.
chid
=
0
,
.
chid
=
0
,
};
};
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp10
2
.c
View file @
ed828666
...
@@ -27,7 +27,7 @@
...
@@ -27,7 +27,7 @@
#include <subdev/timer.h>
#include <subdev/timer.h>
static
int
static
int
gp10
4
_disp_dmac_init
(
struct
nv50_disp_dmac
*
chan
)
gp10
2
_disp_dmac_init
(
struct
nv50_disp_dmac
*
chan
)
{
{
struct
nv50_disp
*
disp
=
chan
->
base
.
root
->
disp
;
struct
nv50_disp
*
disp
=
chan
->
base
.
root
->
disp
;
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
...
@@ -60,8 +60,8 @@ gp104_disp_dmac_init(struct nv50_disp_dmac *chan)
...
@@ -60,8 +60,8 @@ gp104_disp_dmac_init(struct nv50_disp_dmac *chan)
}
}
const
struct
nv50_disp_dmac_func
const
struct
nv50_disp_dmac_func
gp10
4
_disp_dmac_func
=
{
gp10
2
_disp_dmac_func
=
{
.
init
=
gp10
4
_disp_dmac_init
,
.
init
=
gp10
2
_disp_dmac_init
,
.
fini
=
gf119_disp_dmac_fini
,
.
fini
=
gf119_disp_dmac_fini
,
.
bind
=
gf119_disp_dmac_bind
,
.
bind
=
gf119_disp_dmac_bind
,
};
};
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
View file @
ed828666
...
@@ -30,7 +30,7 @@ int gf119_disp_dmac_bind(struct nv50_disp_dmac *, struct nvkm_object *, u32);
...
@@ -30,7 +30,7 @@ int gf119_disp_dmac_bind(struct nv50_disp_dmac *, struct nvkm_object *, u32);
extern
const
struct
nv50_disp_dmac_func
gf119_disp_core_func
;
extern
const
struct
nv50_disp_dmac_func
gf119_disp_core_func
;
void
gf119_disp_core_fini
(
struct
nv50_disp_dmac
*
);
void
gf119_disp_core_fini
(
struct
nv50_disp_dmac
*
);
extern
const
struct
nv50_disp_dmac_func
gp10
4
_disp_dmac_func
;
extern
const
struct
nv50_disp_dmac_func
gp10
2
_disp_dmac_func
;
struct
nv50_disp_dmac_oclass
{
struct
nv50_disp_dmac_oclass
{
int
(
*
ctor
)(
const
struct
nv50_disp_dmac_func
*
,
int
(
*
ctor
)(
const
struct
nv50_disp_dmac_func
*
,
...
@@ -95,7 +95,7 @@ extern const struct nv50_disp_dmac_oclass gm200_disp_core_oclass;
...
@@ -95,7 +95,7 @@ extern const struct nv50_disp_dmac_oclass gm200_disp_core_oclass;
extern
const
struct
nv50_disp_dmac_oclass
gp100_disp_core_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp100_disp_core_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_core_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
2
_disp_core_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_base_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
2
_disp_base_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_ovly_oclass
;
extern
const
struct
nv50_disp_dmac_oclass
gp10
2
_disp_ovly_oclass
;
#endif
#endif
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp10
2
.c
View file @
ed828666
...
@@ -25,7 +25,7 @@
...
@@ -25,7 +25,7 @@
#include "rootnv50.h"
#include "rootnv50.h"
static
void
static
void
gp10
4
_disp_intr_error
(
struct
nv50_disp
*
disp
,
int
chid
)
gp10
2
_disp_intr_error
(
struct
nv50_disp
*
disp
,
int
chid
)
{
{
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
struct
nvkm_subdev
*
subdev
=
&
disp
->
base
.
engine
.
subdev
;
struct
nvkm_device
*
device
=
subdev
->
device
;
struct
nvkm_device
*
device
=
subdev
->
device
;
...
@@ -51,12 +51,12 @@ gp104_disp_intr_error(struct nv50_disp *disp, int chid)
...
@@ -51,12 +51,12 @@ gp104_disp_intr_error(struct nv50_disp *disp, int chid)
}
}
static
const
struct
nv50_disp_func
static
const
struct
nv50_disp_func
gp10
4
_disp
=
{
gp10
2
_disp
=
{
.
intr
=
gf119_disp_intr
,
.
intr
=
gf119_disp_intr
,
.
intr_error
=
gp10
4
_disp_intr_error
,
.
intr_error
=
gp10
2
_disp_intr_error
,
.
uevent
=
&
gf119_disp_chan_uevent
,
.
uevent
=
&
gf119_disp_chan_uevent
,
.
super
=
gf119_disp_intr_supervisor
,
.
super
=
gf119_disp_intr_supervisor
,
.
root
=
&
gp10
4
_disp_root_oclass
,
.
root
=
&
gp10
2
_disp_root_oclass
,
.
head
.
vblank_init
=
gf119_disp_vblank_init
,
.
head
.
vblank_init
=
gf119_disp_vblank_init
,
.
head
.
vblank_fini
=
gf119_disp_vblank_fini
,
.
head
.
vblank_fini
=
gf119_disp_vblank_fini
,
.
head
.
scanoutpos
=
gf119_disp_root_scanoutpos
,
.
head
.
scanoutpos
=
gf119_disp_root_scanoutpos
,
...
@@ -75,7 +75,7 @@ gp104_disp = {
...
@@ -75,7 +75,7 @@ gp104_disp = {
};
};
int
int
gp10
4
_disp_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_disp
**
pdisp
)
gp10
2
_disp_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_disp
**
pdisp
)
{
{
return
gf119_disp_new_
(
&
gp10
4
_disp
,
device
,
index
,
pdisp
);
return
gf119_disp_new_
(
&
gp10
2
_disp
,
device
,
index
,
pdisp
);
}
}
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp10
2
.c
View file @
ed828666
...
@@ -27,12 +27,12 @@
...
@@ -27,12 +27,12 @@
#include <nvif/class.h>
#include <nvif/class.h>
const
struct
nv50_disp_dmac_oclass
const
struct
nv50_disp_dmac_oclass
gp10
4
_disp_ovly_oclass
=
{
gp10
2
_disp_ovly_oclass
=
{
.
base
.
oclass
=
GK104_DISP_OVERLAY_CONTROL_DMA
,
.
base
.
oclass
=
GK104_DISP_OVERLAY_CONTROL_DMA
,
.
base
.
minver
=
0
,
.
base
.
minver
=
0
,
.
base
.
maxver
=
0
,
.
base
.
maxver
=
0
,
.
ctor
=
nv50_disp_ovly_new
,
.
ctor
=
nv50_disp_ovly_new
,
.
func
=
&
gp10
4
_disp_dmac_func
,
.
func
=
&
gp10
2
_disp_dmac_func
,
.
mthd
=
&
gk104_disp_ovly_chan_mthd
,
.
mthd
=
&
gk104_disp_ovly_chan_mthd
,
.
chid
=
5
,
.
chid
=
5
,
};
};
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp10
4
.c
→
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp10
2
.c
View file @
ed828666
...
@@ -27,13 +27,13 @@
...
@@ -27,13 +27,13 @@
#include <nvif/class.h>
#include <nvif/class.h>
static
const
struct
nv50_disp_root_func
static
const
struct
nv50_disp_root_func
gp10
4
_disp_root
=
{
gp10
2
_disp_root
=
{
.
init
=
gf119_disp_root_init
,
.
init
=
gf119_disp_root_init
,
.
fini
=
gf119_disp_root_fini
,
.
fini
=
gf119_disp_root_fini
,
.
dmac
=
{
.
dmac
=
{
&
gp10
4
_disp_core_oclass
,
&
gp10
2
_disp_core_oclass
,
&
gp10
4
_disp_base_oclass
,
&
gp10
2
_disp_base_oclass
,
&
gp10
4
_disp_ovly_oclass
,
&
gp10
2
_disp_ovly_oclass
,
},
},
.
pioc
=
{
.
pioc
=
{
&
gp102_disp_oimm_oclass
,
&
gp102_disp_oimm_oclass
,
...
@@ -42,17 +42,17 @@ gp104_disp_root = {
...
@@ -42,17 +42,17 @@ gp104_disp_root = {
};
};
static
int
static
int
gp10
4
_disp_root_new
(
struct
nvkm_disp
*
disp
,
const
struct
nvkm_oclass
*
oclass
,
gp10
2
_disp_root_new
(
struct
nvkm_disp
*
disp
,
const
struct
nvkm_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
void
*
data
,
u32
size
,
struct
nvkm_object
**
pobject
)
{
{
return
nv50_disp_root_new_
(
&
gp10
4
_disp_root
,
disp
,
oclass
,
return
nv50_disp_root_new_
(
&
gp10
2
_disp_root
,
disp
,
oclass
,
data
,
size
,
pobject
);
data
,
size
,
pobject
);
}
}
const
struct
nvkm_disp_oclass
const
struct
nvkm_disp_oclass
gp10
4
_disp_root_oclass
=
{
gp10
2
_disp_root_oclass
=
{
.
base
.
oclass
=
GP10
4
_DISP
,
.
base
.
oclass
=
GP10
2
_DISP
,
.
base
.
minver
=
-
1
,
.
base
.
minver
=
-
1
,
.
base
.
maxver
=
-
1
,
.
base
.
maxver
=
-
1
,
.
ctor
=
gp10
4
_disp_root_new
,
.
ctor
=
gp10
2
_disp_root_new
,
};
};
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h
View file @
ed828666
...
@@ -41,5 +41,5 @@ extern const struct nvkm_disp_oclass gk110_disp_root_oclass;
...
@@ -41,5 +41,5 @@ extern const struct nvkm_disp_oclass gk110_disp_root_oclass;
extern
const
struct
nvkm_disp_oclass
gm107_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gm107_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gm200_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gm200_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gp100_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gp100_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gp10
4
_disp_root_oclass
;
extern
const
struct
nvkm_disp_oclass
gp10
2
_disp_root_oclass
;
#endif
#endif
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