Commit eebe6d00 authored by Robert Foss's avatar Robert Foss Committed by Mauro Carvalho Chehab

media: camss: Add support for CSID hardware version Titan 170

Add register definitions for version 170 of the Titan architecture
and implement support for the CSID subdevice.
Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
Reviewed-by: default avatarAndrey Konovalov <andrey.konovalov@linaro.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 76005817
......@@ -6,6 +6,7 @@ qcom-camss-objs += \
camss-csid.o \
camss-csid-4-1.o \
camss-csid-4-7.o \
camss-csid-170.o \
camss-csiphy-2ph-1-0.o \
camss-csiphy-3ph-1-0.o \
camss-csiphy.o \
......
This diff is collapsed.
......@@ -35,6 +35,9 @@ const char * const csid_testgen_modes[] = {
"All Ones 0xFF",
"Pseudo-random Data",
"User Specified",
"Complex pattern",
"Color box",
"Color bars",
NULL
};
......@@ -131,6 +134,8 @@ static int csid_set_clock_rates(struct csid_device *csid)
dev_err(dev, "clk set rate failed: %d\n", ret);
return ret;
}
} else if (clock->nfreqs) {
clk_set_rate(clock->clk, clock->freq[0]);
}
}
......@@ -552,6 +557,8 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid,
} else if (camss->version == CAMSS_8x96 ||
camss->version == CAMSS_660) {
csid->ops = &csid_ops_4_7;
} else if (camss->version == CAMSS_845) {
csid->ops = &csid_ops_170;
} else {
return -EINVAL;
}
......
......@@ -56,6 +56,10 @@ enum csid_testgen_mode {
CSID_PAYLOAD_MODE_RANDOM = 5,
CSID_PAYLOAD_MODE_USER_SPECIFIED = 6,
CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN1 = 6, /* excluding disabled */
CSID_PAYLOAD_MODE_COMPLEX_PATTERN = 7,
CSID_PAYLOAD_MODE_COLOR_BOX = 8,
CSID_PAYLOAD_MODE_COLOR_BARS = 9,
CSID_PAYLOAD_MODE_NUM_SUPPORTED_GEN2 = 9, /* excluding disabled */
};
struct csid_format {
......@@ -201,5 +205,7 @@ extern const char * const csid_testgen_modes[];
extern const struct csid_hw_ops csid_ops_4_1;
extern const struct csid_hw_ops csid_ops_4_7;
extern const struct csid_hw_ops csid_ops_170;
#endif /* QC_MSM_CAMSS_CSID_H */
......@@ -258,7 +258,6 @@ static void vfe_wm_start(struct vfe_device *vfe, u8 wm, struct vfe_line *line)
writel_relaxed(val, vfe->base + VFE_BUS_WM_PACKER_CFG(wm)); // XXX 1 for PLAIN8?
/* Configure stride for RDIs */
//val = pix->plane_fmt[0].bytesperline;
val = WM_STRIDE_DEFAULT_STRIDE;
writel_relaxed(val, vfe->base + VFE_BUS_WM_STRIDE(wm));
......
......@@ -465,6 +465,68 @@ static const struct resources vfe_res_660[] = {
}
};
static const struct resources csid_res_845[] = {
/* CSID0 */
{
.regulator = { "vdda-csi0" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe0", "vfe0_src",
"vfe0_cphy_rx", "csi0",
"csi0_src" },
.clock_rate = { { 0 },
{ 384000000 },
{ 80000000 },
{ 0 },
{ 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 },
{ 320000000 },
{ 0 },
{ 19200000, 75000000, 384000000, 538666667 },
{ 384000000 } },
.reg = { "csid0" },
.interrupt = { "csid0" }
},
/* CSID1 */
{
.regulator = { "vdda-csi1" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe1", "vfe1_src",
"vfe1_cphy_rx", "csi1",
"csi1_src" },
.clock_rate = { { 0 },
{ 384000000 },
{ 80000000 },
{ 0 },
{ 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 },
{ 320000000 },
{ 0 },
{ 19200000, 75000000, 384000000, 538666667 },
{ 384000000 } },
.reg = { "csid1" },
.interrupt = { "csid1" }
},
/* CSID2 */
{
.regulator = { "vdda-csi2" },
.clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src",
"soc_ahb", "vfe_lite", "vfe_lite_src",
"vfe_lite_cphy_rx", "csi2",
"csi2_src" },
.clock_rate = { { 0 },
{ 384000000 },
{ 80000000 },
{ 0 },
{ 19200000, 100000000, 320000000, 404000000, 480000000, 600000000 },
{ 320000000 },
{ 0 },
{ 19200000, 75000000, 384000000, 538666667 },
{ 384000000 } },
.reg = { "csid2" },
.interrupt = { "csid2" }
}
};
static const struct resources vfe_res_845[] = {
/* VFE0 */
{
......
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