Commit ef07388e authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: kerneldoc for intel_fifo_underrun.c

v2: Fix spelling fail.
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parent 0f239f4c
...@@ -3829,6 +3829,11 @@ int num_ioctls;</synopsis> ...@@ -3829,6 +3829,11 @@ int num_ioctls;</synopsis>
!Idrivers/gpu/drm/i915/intel_frontbuffer.c !Idrivers/gpu/drm/i915/intel_frontbuffer.c
!Fdrivers/gpu/drm/i915/intel_drv.h intel_frontbuffer_flip !Fdrivers/gpu/drm/i915/intel_drv.h intel_frontbuffer_flip
!Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb !Fdrivers/gpu/drm/i915/i915_gem.c i915_gem_track_fb
</sect2>
<sect2>
<title>Display FIFO Underrun Reporting</title>
!Pdrivers/gpu/drm/i915/intel_fifo_underrun.c fifo underrun handling
!Idrivers/gpu/drm/i915/intel_fifo_underrun.c
</sect2> </sect2>
<sect2> <sect2>
<title>Plane Configuration</title> <title>Plane Configuration</title>
......
...@@ -28,6 +28,26 @@ ...@@ -28,6 +28,26 @@
#include "i915_drv.h" #include "i915_drv.h"
#include "intel_drv.h" #include "intel_drv.h"
/**
* DOC: fifo underrun handling
*
* The i915 driver checks for display fifo underruns using the interrupt signals
* provided by the hardware. This is enabled by default and fairly useful to
* debug display issues, especially watermark settings.
*
* If an underrun is detected this is logged into dmesg. To avoid flooding logs
* and occupying the cpu underrun interrupts are disabled after the first
* occurrence until the next modeset on a given pipe.
*
* Note that underrun detection on gmch platforms is a bit more ugly since there
* is no interrupt (despite that the signalling bit is in the PIPESTAT pipe
* interrupt register). Also on some other platforms underrun interrupts are
* shared, which means that if we detect an underrun we need to disable underrun
* reporting on all pipes.
*
* The code also supports underrun detection on the PCH transcoder.
*/
static bool ivb_can_enable_err_int(struct drm_device *dev) static bool ivb_can_enable_err_int(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
...@@ -64,6 +84,14 @@ static bool cpt_can_enable_serr_int(struct drm_device *dev) ...@@ -64,6 +84,14 @@ static bool cpt_can_enable_serr_int(struct drm_device *dev)
return true; return true;
} }
/**
* i9xx_check_fifo_underruns - check for fifo underruns
* @dev_priv: i915 device instance
*
* This function checks for fifo underruns on GMCH platforms. This needs to be
* done manually on modeset to make sure that we catch all underruns since they
* do not generate an interrupt by themselves on these platforms.
*/
void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv) void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv)
{ {
struct intel_crtc *crtc; struct intel_crtc *crtc;
...@@ -199,20 +227,6 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev, ...@@ -199,20 +227,6 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
} }
} }
/**
* intel_set_cpu_fifo_underrun_reporting - enable/disable FIFO underrun messages
* @dev: drm device
* @pipe: pipe
* @enable: true if we want to report FIFO underrun errors, false otherwise
*
* This function makes us disable or enable CPU fifo underruns for a specific
* pipe. Notice that on some Gens (e.g. IVB, HSW), disabling FIFO underrun
* reporting for one pipe may also disable all the other CPU error interruts for
* the other pipes, due to the fact that there's just one interrupt mask/enable
* bit for all the pipes.
*
* Returns the previous state of underrun reporting.
*/
static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev, static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
enum pipe pipe, bool enable) enum pipe pipe, bool enable)
{ {
...@@ -238,6 +252,22 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev, ...@@ -238,6 +252,22 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
return old; return old;
} }
/**
* intel_set_cpu_fifo_underrun_reporting - set cpu fifo underrrun reporting state
* @dev_priv: i915 device instance
* @pipe: (CPU) pipe to set state for
* @enable: whether underruns should be reported or not
*
* This function sets the fifo underrun state for @pipe. It is used in the
* modeset code to avoid false positives since on many platforms underruns are
* expected when disabling or enabling the pipe.
*
* Notice that on some platforms disabling underrun reports for one pipe
* disables for all due to shared interrupts. Actual reporting is still per-pipe
* though.
*
* Returns the previous state of underrun reporting.
*/
bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv, bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
enum pipe pipe, bool enable) enum pipe pipe, bool enable)
{ {
...@@ -263,10 +293,10 @@ __cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv, ...@@ -263,10 +293,10 @@ __cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
} }
/** /**
* intel_set_pch_fifo_underrun_reporting - enable/disable FIFO underrun messages * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
* @dev: drm device * @dev_priv: i915 device instance
* @pch_transcoder: the PCH transcoder (same as pipe on IVB and older) * @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
* @enable: true if we want to report FIFO underrun errors, false otherwise * @enable: whether underruns should be reported or not
* *
* This function makes us disable or enable PCH fifo underruns for a specific * This function makes us disable or enable PCH fifo underruns for a specific
* PCH transcoder. Notice that on some PCHs (e.g. CPT/PPT), disabling FIFO * PCH transcoder. Notice that on some PCHs (e.g. CPT/PPT), disabling FIFO
...@@ -310,6 +340,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv, ...@@ -310,6 +340,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
return old; return old;
} }
/**
* intel_pch_fifo_underrun_irq_handler - handle PCH fifo underrun interrupt
* @dev_priv: i915 device instance
* @pipe: (CPU) pipe to set state for
*
* This handles a CPU fifo underrun interrupt, generating an underrun warning
* into dmesg if underrun reporting is enabled and then disables the underrun
* interrupt to avoid an irq storm.
*/
void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
enum pipe pipe) enum pipe pipe)
{ {
...@@ -323,6 +362,15 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, ...@@ -323,6 +362,15 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
pipe_name(pipe)); pipe_name(pipe));
} }
/**
* intel_pch_fifo_underrun_irq_handler - handle PCH fifo underrun interrupt
* @dev_priv: i915 device instance
* @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
*
* This handles a PCH fifo underrun interrupt, generating an underrun warning
* into dmesg if underrun reporting is enabled and then disables the underrun
* interrupt to avoid an irq storm.
*/
void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
enum transcoder pch_transcoder) enum transcoder pch_transcoder)
{ {
......
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