Commit efee5e14 authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo

ARM: mx5: Add NAND pinctrl data

This patch adds pinctrl data for NAND on MX53.
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent ed5be465
......@@ -508,6 +508,28 @@ MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
};
};
nand {
pinctrl_nand_1: nandgrp-1 {
fsl,pins = <
MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
>;
};
};
owire {
pinctrl_owire_1: owiregrp-1 {
fsl,pins = <
......@@ -577,7 +599,6 @@ MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5
>;
};
};
};
gpr: iomuxc-gpr@53fa8000 {
......
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