Commit f0afdb42 authored by Vahram Aharonyan's avatar Vahram Aharonyan Committed by Felipe Balbi

usb: dwc2: gadget: For DDMA parse setup only after SetUp interrupt

Tests with various hosts show that depend on time difference between
host sending SETUP packet and IN/OUT token SW could get Xfercomplete
interrupt without SetUp interrupt. On the other hand, SW should parse
received SETUP packet only after ensuring that Host has moved to either
Data or Status stage of control transfer.

For this purpose added checking in the dwc2_hsotg_epint() function to
not handle xfercomplete and postpone SETUP packet analysis till SW's
getting of setup phase done interrupt.
Signed-off-by: default avatarVahram Aharonyan <vahrama@synopsys.com>
Signed-off-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 95d2b037
...@@ -2838,6 +2838,16 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, ...@@ -2838,6 +2838,16 @@ static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx,
if (idx == 0 && (ints & (DXEPINT_SETUP | DXEPINT_SETUP_RCVD))) if (idx == 0 && (ints & (DXEPINT_SETUP | DXEPINT_SETUP_RCVD)))
ints &= ~DXEPINT_XFERCOMPL; ints &= ~DXEPINT_XFERCOMPL;
/*
* Don't process XferCompl interrupt in DDMA if EP0 is still in SETUP
* stage and xfercomplete was generated without SETUP phase done
* interrupt. SW should parse received setup packet only after host's
* exit from setup phase of control transfer.
*/
if (using_desc_dma(hsotg) && idx == 0 && !hs_ep->dir_in &&
hsotg->ep0_state == DWC2_EP0_SETUP && !(ints & DXEPINT_SETUP))
ints &= ~DXEPINT_XFERCOMPL;
if (ints & DXEPINT_XFERCOMPL) { if (ints & DXEPINT_XFERCOMPL) {
dev_dbg(hsotg->dev, dev_dbg(hsotg->dev,
"%s: XferCompl: DxEPCTL=0x%08x, DXEPTSIZ=%08x\n", "%s: XferCompl: DxEPCTL=0x%08x, DXEPTSIZ=%08x\n",
......
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