[ARM] Fix ELF "HWCAP" flags for the various CPU types.

Some of the CPU implementations copied the ELF flags from the
StrongARM-110 implementation, without thinking whether they were
correct or not.  This changeset fixes up these CPU types.

arch/arm/mm/proc-arm1020.S

@@ -394,8 +394,6 @@ ENTRY(cpu_arm1020_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm1020_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -553,7 +551,7 @@ __arm1020_proc_info:
 	b	__arm1020_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm1020_info
 	.long	arm1020_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm6_7.S

@@ -272,8 +272,6 @@ ENTRY(cpu_arm7_set_pmd)
 		.align	5
 ENTRY(cpu_arm6_set_pte)
 ENTRY(cpu_arm7_set_pte)
-		tst	r0, #2048
-		streq	r0, [r0, -r0]			@ BUG_ON
 		str	r1, [r0], #-2048		@ linux version
 
 		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY

arch/arm/mm/proc-arm720.S

@@ -135,8 +135,6 @@ ENTRY(cpu_arm720_set_pmd)
  */
 		.align	5
 ENTRY(cpu_arm720_set_pte)
-		tst	r0, #2048
-		streq	r0, [r0, -r0]			@ BUG_ON
 		str	r1, [r0], #-2048		@ linux version
 
 		eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -257,7 +255,7 @@ __arm720_proc_info:
 		b	__arm720_setup				@ cpu_flush
 		.long	cpu_arch_name				@ arch_name
 		.long	cpu_elf_name				@ elf_name
-		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT	@ elf_hwcap
+		.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB	@ elf_hwcap
 		.long	cpu_arm720_info				@ info
 		.long	arm720_processor_functions
 		.long	v4_tlb_fns

arch/arm/mm/proc-arm920.S

@@ -539,7 +539,7 @@ __arm920_proc_info:
 	b	__arm920_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm920_info
 	.long	arm920_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm922.S

@@ -395,8 +395,6 @@ ENTRY(cpu_arm922_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm922_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -540,7 +538,7 @@ __arm922_proc_info:
 	b	__arm922_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
 	.long	cpu_arm922_info
 	.long	arm922_processor_functions
 	.long	v4wbi_tlb_fns

arch/arm/mm/proc-arm926.S

 /*
- *  linux/arch/arm/mm/arm926.S: MMU functions for ARM926EJ-S
+ *  linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
  *
  *  Copyright (C) 1999-2001 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
@@ -378,8 +378,6 @@ ENTRY(cpu_arm926_set_pmd)
  */
 	.align	5
 ENTRY(cpu_arm926_set_pte)
-	tst	r0, #2048
-	streq	r0, [r0, -r0]			@ BUG_ON
 	str	r1, [r0], #-2048		@ linux version
 
 	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
@@ -442,7 +440,7 @@ __arm926_setup:
 	mcr	p15, 0, r4, c2, c0		@ load page table pointer
 
 
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
 	mov	r0, #4				@ disable write-back on caches explicitly
 	mcr	p15, 7, r0, c15, c0, 0
 #endif 
@@ -519,12 +517,12 @@ cpu_arm926_info:
 
 	.type	cpu_arch_name, #object
 cpu_arch_name:
-	.asciz	"armv5EJ"
+	.asciz	"armv5tej"
 	.size	cpu_arch_name, . - cpu_arch_name
 
 	.type	cpu_elf_name, #object
 cpu_elf_name:
-	.asciz	"v5EJ"
+	.asciz	"v5"
 	.size	cpu_elf_name, . - cpu_elf_name
 	.align
 
@@ -538,7 +536,8 @@ __arm926_proc_info:
 	b	__arm926_setup
 	.long	cpu_arch_name
 	.long	cpu_elf_name
-	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | \
+		HWCAP_FAST_MULT | HWCAP_JAVA
 	.long	cpu_arm926_info
 	.long	arm926_processor_functions
 	.long	v4wbi_tlb_fns

include/asm-arm/procinfo.h

@@ -50,13 +50,14 @@ struct proc_info_list {
 
 #define PROC_INFO_SZ	44
 
-#define HWCAP_SWP	 1
-#define HWCAP_HALF	 2
-#define HWCAP_THUMB	 4
-#define HWCAP_26BIT	 8	/* Play it safe */
-#define HWCAP_FAST_MULT	 16
-#define HWCAP_FPA        32
-#define HWCAP_VFP        64
-#define HWCAP_EDSP	 128
+#define HWCAP_SWP	1
+#define HWCAP_HALF	2
+#define HWCAP_THUMB	4
+#define HWCAP_26BIT	8	/* Play it safe */
+#define HWCAP_FAST_MULT	16
+#define HWCAP_FPA	32
+#define HWCAP_VFP	64
+#define HWCAP_EDSP	128
+#define HWCAP_JAVA	256
 
 #endif