[BNX2X]: Correct Link management
Properly protect PHY access between two devices on the same board with a HW lock. Use GPIO to clear all previous configurations before changing link parameters. Shut down the external PHY in case of fan failure. Reducing the MDC/MDIO clock to 2.5MHz due to problems with some devices. Resolve the flow control response according to autoneg with external PHY. Unmasking all PHY interrupts in single write to prevent a race in the interrupts order. LASI indication fixes to work with peculiarities of PHYs. Disable MAC RX to avoid a HW bug when closing the MAC under traffic. Disable parallel detection on HiGig due to HW limitation. Updating the shared memory structure to work with the current bootcode. Signed-off-by: Eliezer Tamir <eliezert@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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