Commit f1c73396 authored by Raju Lakkaraju's avatar Raju Lakkaraju Committed by Jakub Kicinski

net: pcs: xpcs: Add 2500BASE-X case in get state for XPCS drivers

Add DW_2500BASEX case in xpcs_get_state( ) to update speed, duplex and pause
Signed-off-by: default avatarRaju Lakkaraju <Raju.Lakkaraju@microchip.com>
Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20231027044306.291250-1-Raju.Lakkaraju@microchip.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 06497763
...@@ -1090,6 +1090,28 @@ static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs, ...@@ -1090,6 +1090,28 @@ static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,
return 0; return 0;
} }
static int xpcs_get_state_2500basex(struct dw_xpcs *xpcs,
struct phylink_link_state *state)
{
int ret;
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_STS);
if (ret < 0) {
state->link = 0;
return ret;
}
state->link = !!(ret & DW_VR_MII_MMD_STS_LINK_STS);
if (!state->link)
return 0;
state->speed = SPEED_2500;
state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
state->duplex = DUPLEX_FULL;
return 0;
}
static void xpcs_get_state(struct phylink_pcs *pcs, static void xpcs_get_state(struct phylink_pcs *pcs,
struct phylink_link_state *state) struct phylink_link_state *state)
{ {
...@@ -1127,6 +1149,13 @@ static void xpcs_get_state(struct phylink_pcs *pcs, ...@@ -1127,6 +1149,13 @@ static void xpcs_get_state(struct phylink_pcs *pcs,
ERR_PTR(ret)); ERR_PTR(ret));
} }
break; break;
case DW_2500BASEX:
ret = xpcs_get_state_2500basex(xpcs, state);
if (ret) {
pr_err("xpcs_get_state_2500basex returned %pe\n",
ERR_PTR(ret));
}
break;
default: default:
return; return;
} }
......
...@@ -55,6 +55,8 @@ ...@@ -55,6 +55,8 @@
/* Clause 37 Defines */ /* Clause 37 Defines */
/* VR MII MMD registers offsets */ /* VR MII MMD registers offsets */
#define DW_VR_MII_MMD_CTRL 0x0000 #define DW_VR_MII_MMD_CTRL 0x0000
#define DW_VR_MII_MMD_STS 0x0001
#define DW_VR_MII_MMD_STS_LINK_STS BIT(2)
#define DW_VR_MII_DIG_CTRL1 0x8000 #define DW_VR_MII_DIG_CTRL1 0x8000
#define DW_VR_MII_AN_CTRL 0x8001 #define DW_VR_MII_AN_CTRL 0x8001
#define DW_VR_MII_AN_INTR_STS 0x8002 #define DW_VR_MII_AN_INTR_STS 0x8002
......
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