Commit f20311cc authored by Michael Walle's avatar Michael Walle Committed by Herbert Xu

crypto: caam - disable pkc for non-E SoCs

On newer CAAM versions, not all accelerators are disabled if the SoC is
a non-E variant. While the driver checks most of the modules for
availability, there is one - PKHA - which sticks out. On non-E variants
it is still reported as available, that is the number of instances is
non-zero, but it has limited functionality. In particular it doesn't
support encryption and decryption, but just signing and verifying. This
is indicated by a bit in the PKHA_MISC field. Take this bit into account
if we are checking for availability.

This will the following error:
[    8.167817] caam_jr 8020000.jr: 20000b0f: CCB: desc idx 11: : Invalid CHA selected.

Tested on an NXP LS1028A (non-E) SoC.

Fixes: d239b10d ("crypto: caam - add register map changes cf. Era 10")
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarHoria Geantă <horia.geanta@nxp.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent a2d3cbc8
......@@ -1153,16 +1153,27 @@ static struct caam_akcipher_alg caam_rsa = {
int caam_pkc_init(struct device *ctrldev)
{
struct caam_drv_private *priv = dev_get_drvdata(ctrldev);
u32 pk_inst;
u32 pk_inst, pkha;
int err;
init_done = false;
/* Determine public key hardware accelerator presence. */
if (priv->era < 10)
if (priv->era < 10) {
pk_inst = (rd_reg32(&priv->ctrl->perfmon.cha_num_ls) &
CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT;
else
pk_inst = rd_reg32(&priv->ctrl->vreg.pkha) & CHA_VER_NUM_MASK;
} else {
pkha = rd_reg32(&priv->ctrl->vreg.pkha);
pk_inst = pkha & CHA_VER_NUM_MASK;
/*
* Newer CAAMs support partially disabled functionality. If this is the
* case, the number is non-zero, but this bit is set to indicate that
* no encryption or decryption is supported. Only signing and verifying
* is supported.
*/
if (pkha & CHA_VER_MISC_PKHA_NO_CRYPT)
pk_inst = 0;
}
/* Do not register algorithms if PKHA is not present. */
if (!pk_inst)
......
......@@ -322,6 +322,9 @@ struct version_regs {
/* CHA Miscellaneous Information - AESA_MISC specific */
#define CHA_VER_MISC_AES_GCM BIT(1 + CHA_VER_MISC_SHIFT)
/* CHA Miscellaneous Information - PKHA_MISC specific */
#define CHA_VER_MISC_PKHA_NO_CRYPT BIT(7 + CHA_VER_MISC_SHIFT)
/*
* caam_perfmon - Performance Monitor/Secure Memory Status/
* CAAM Global Status/Component Version IDs
......
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