Commit f2a94192 authored by Barry Song's avatar Barry Song Committed by Barry Song

ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco

in Marco, we will use GIC. this patch prepares the handle_irq for prima2
to avoid the compiling errors since we want only one defconfig and zImage
for both prima2 and marco that means we will need handle_irq for both.
Signed-off-by: default avatarBaohua Song <Baohua.Song@csr.com>
parent 598548fa
...@@ -41,6 +41,9 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)") ...@@ -41,6 +41,9 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
.map_io = sirfsoc_map_lluart, .map_io = sirfsoc_map_lluart,
.init_irq = sirfsoc_of_irq_init, .init_irq = sirfsoc_of_irq_init,
.init_time = sirfsoc_prima2_timer_init, .init_time = sirfsoc_prima2_timer_init,
#ifdef CONFIG_MULTI_IRQ_HANDLER
.handle_irq = sirfsoc_handle_irq,
#endif
.dma_zone_size = SZ_256M, .dma_zone_size = SZ_256M,
.init_machine = sirfsoc_mach_init, .init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late, .init_late = sirfsoc_init_late,
......
...@@ -11,12 +11,14 @@ ...@@ -11,12 +11,14 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/exception.h>
extern void sirfsoc_prima2_timer_init(void); extern void sirfsoc_prima2_timer_init(void);
extern void __init sirfsoc_of_irq_init(void); extern void __init sirfsoc_of_irq_init(void);
extern void __init sirfsoc_of_clk_init(void); extern void __init sirfsoc_of_clk_init(void);
extern void sirfsoc_restart(char, const char *); extern void sirfsoc_restart(char, const char *);
extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
#ifndef CONFIG_DEBUG_LL #ifndef CONFIG_DEBUG_LL
static inline void sirfsoc_map_lluart(void) {} static inline void sirfsoc_map_lluart(void) {}
......
...@@ -10,8 +10,8 @@ ...@@ -10,8 +10,8 @@
#define __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H
#define SIRFSOC_INTENAL_IRQ_START 0 #define SIRFSOC_INTENAL_IRQ_START 0
#define SIRFSOC_INTENAL_IRQ_END 59 #define SIRFSOC_INTENAL_IRQ_END 127
#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1) #define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
#define NR_IRQS 220 #define NR_IRQS 288
#endif #endif
...@@ -9,17 +9,19 @@ ...@@ -9,17 +9,19 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_address.h> #include <linux/of_address.h>
#include <linux/irqdomain.h> #include <linux/irqdomain.h>
#include <linux/syscore_ops.h> #include <linux/syscore_ops.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#define SIRFSOC_INT_RISC_MASK0 0x0018 #define SIRFSOC_INT_RISC_MASK0 0x0018
#define SIRFSOC_INT_RISC_MASK1 0x001C #define SIRFSOC_INT_RISC_MASK1 0x001C
#define SIRFSOC_INT_RISC_LEVEL0 0x0020 #define SIRFSOC_INT_RISC_LEVEL0 0x0020
#define SIRFSOC_INT_RISC_LEVEL1 0x0024 #define SIRFSOC_INT_RISC_LEVEL1 0x0024
#define SIRFSOC_INIT_IRQ_ID 0x0038
void __iomem *sirfsoc_intc_base; void __iomem *sirfsoc_intc_base;
...@@ -52,6 +54,16 @@ static __init void sirfsoc_irq_init(void) ...@@ -52,6 +54,16 @@ static __init void sirfsoc_irq_init(void)
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1); writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1);
} }
asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs)
{
u32 irqstat, irqnr;
irqstat = readl_relaxed(sirfsoc_intc_base + SIRFSOC_INIT_IRQ_ID);
irqnr = irqstat & 0xff;
handle_IRQ(irqnr, regs);
}
static struct of_device_id intc_ids[] = { static struct of_device_id intc_ids[] = {
{ .compatible = "sirf,prima2-intc" }, { .compatible = "sirf,prima2-intc" },
{}, {},
......
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