Commit f3ec7a23 authored by Markos Chandras's avatar Markos Chandras Committed by Ralf Baechle

MIPS: uasm: Add mfhi uasm instruction

It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6728/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4c12a854
...@@ -131,6 +131,7 @@ Ip_u1s2(_lui); ...@@ -131,6 +131,7 @@ Ip_u1s2(_lui);
Ip_u2s3u1(_lw); Ip_u2s3u1(_lw);
Ip_u3u1u2(_lwx); Ip_u3u1u2(_lwx);
Ip_u1u2u3(_mfc0); Ip_u1u2u3(_mfc0);
Ip_u1(_mfhi);
Ip_u1u2u3(_mtc0); Ip_u1u2u3(_mtc0);
Ip_u3u1u2(_or); Ip_u3u1u2(_or);
Ip_u2u1u3(_ori); Ip_u2u1u3(_ori);
......
...@@ -300,6 +300,7 @@ enum mm_32axf_minor_op { ...@@ -300,6 +300,7 @@ enum mm_32axf_minor_op {
mm_mfc0_op = 0x003, mm_mfc0_op = 0x003,
mm_mtc0_op = 0x00b, mm_mtc0_op = 0x00b,
mm_tlbp_op = 0x00d, mm_tlbp_op = 0x00d,
mm_mfhi32_op = 0x035,
mm_jalr_op = 0x03c, mm_jalr_op = 0x03c,
mm_tlbr_op = 0x04d, mm_tlbr_op = 0x04d,
mm_jalrhb_op = 0x07c, mm_jalrhb_op = 0x07c,
......
...@@ -86,6 +86,7 @@ static struct insn insn_table_MM[] = { ...@@ -86,6 +86,7 @@ static struct insn insn_table_MM[] = {
{ insn_lui, M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM }, { insn_lui, M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM },
{ insn_lw, M(mm_lw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, { insn_lw, M(mm_lw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
{ insn_mfc0, M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD }, { insn_mfc0, M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD },
{ insn_mfhi, M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS },
{ insn_mtc0, M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD }, { insn_mtc0, M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD },
{ insn_or, M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD }, { insn_or, M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD },
{ insn_ori, M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM }, { insn_ori, M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM },
......
...@@ -94,6 +94,7 @@ static struct insn insn_table[] = { ...@@ -94,6 +94,7 @@ static struct insn insn_table[] = {
{ insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
{ insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD }, { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD },
{ insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_mfhi, M(spec_op, 0, 0, 0, 0, mfhi_op), RD },
{ insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
{ insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
{ insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
......
...@@ -51,10 +51,11 @@ enum opcode { ...@@ -51,10 +51,11 @@ enum opcode {
insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld, insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0,
insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe,
insn_scd, insn_sd, insn_sll, insn_sllv, insn_sra, insn_srl, insn_srlv, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, insn_sra,
insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall,
insn_tlbwi, insn_tlbwr, insn_wait, insn_xor, insn_xori, insn_yield, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_xor,
insn_xori, insn_yield,
}; };
struct insn { struct insn {
...@@ -273,6 +274,7 @@ I_u2s3u1(_lld) ...@@ -273,6 +274,7 @@ I_u2s3u1(_lld)
I_u1s2(_lui) I_u1s2(_lui)
I_u2s3u1(_lw) I_u2s3u1(_lw)
I_u1u2u3(_mfc0) I_u1u2u3(_mfc0)
I_u1(_mfhi)
I_u1u2u3(_mtc0) I_u1u2u3(_mtc0)
I_u2u1u3(_ori) I_u2u1u3(_ori)
I_u3u1u2(_or) I_u3u1u2(_or)
......
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