Commit f4117ac9 authored by Russell King's avatar Russell King

ARM: P2V: separate PHYS_OFFSET from platform definitions

This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: default avatarMagnus Damm <damm@opensource.se>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Acked-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: default avatarWan ZongShun <mcuos.com@gmail.com>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Acked-by: default avatarEric Miao <eric.y.miao@gmail.com>
Acked-by: default avatarJiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 6fc31d54
......@@ -24,6 +24,8 @@
*/
#define UL(x) _AC(x, UL)
#define PHYS_OFFSET PLAT_PHYS_OFFSET
#ifdef CONFIG_MMU
/*
......
......@@ -15,7 +15,7 @@
#include <linux/string.h> /* memcpy */
#include <asm/cputype.h>
#include <asm/mach/map.h>
#include <mach/memory.h>
#include <asm/memory.h>
#include "tcm.h"
static struct gen_pool *tcm_pool;
......
......@@ -12,6 +12,6 @@
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0xf0000000)
#define PLAT_PHYS_OFFSET UL(0xf0000000)
#endif /* __ASM_ARCH_MEMORY_H */
......@@ -23,6 +23,6 @@
#include <mach/hardware.h>
#define PHYS_OFFSET (AT91_SDRAM_BASE)
#define PLAT_PHYS_OFFSET (AT91_SDRAM_BASE)
#endif
......@@ -31,7 +31,7 @@
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define RAM_START PHYS_OFFSET
#define RAM_START PLAT_PHYS_OFFSET
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
#define RAM_BASE PAGE_OFFSET
......
......@@ -23,7 +23,7 @@
* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
*/
#define PHYS_OFFSET CFG_GLOBAL_RAM_BASE
#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
/*
* Maximum DMA memory allowed is 14M
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
......
......@@ -13,7 +13,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
......
......@@ -26,9 +26,9 @@
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
#error Cannot enable DaVinci and DA8XX platforms concurrently
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
#define PHYS_OFFSET DA8XX_DDR_BASE
#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
#else
#define PHYS_OFFSET DAVINCI_DDR_BASE
#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
#endif
#define DDR2_SDRCR_OFFSET 0xc
......
......@@ -5,6 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -19,7 +19,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
/*
* Cache flushing area - SRAM
......
......@@ -6,15 +6,15 @@
#define __ASM_ARCH_MEMORY_H
#if defined(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xd0000000)
#define PLAT_PHYS_OFFSET UL(0xd0000000)
#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xe0000000)
#define PLAT_PHYS_OFFSET UL(0xe0000000)
#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
#define PHYS_OFFSET UL(0xf0000000)
#define PLAT_PHYS_OFFSET UL(0xf0000000)
#else
#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
#endif
......
......@@ -62,7 +62,7 @@ extern unsigned long __bus_to_pfn(unsigned long);
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define FLUSH_BASE_PHYS 0x50000000
......
......@@ -11,9 +11,9 @@
#define __MACH_MEMORY_H
#ifdef CONFIG_GEMINI_MEM_SWAP
# define PHYS_OFFSET UL(0x00000000)
# define PLAT_PHYS_OFFSET UL(0x00000000)
#else
# define PHYS_OFFSET UL(0x10000000)
# define PLAT_PHYS_OFFSET UL(0x10000000)
#endif
#endif /* __MACH_MEMORY_H */
......@@ -7,7 +7,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x40000000)
#define PLAT_PHYS_OFFSET UL(0x40000000)
/*
* This is the maximum DMA address that can be DMAd to.
* There should not be more than (0xd0000000 - 0xc0000000)
......
......@@ -23,7 +23,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x80000000)
#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
......
......@@ -6,7 +6,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#ifndef __ASSEMBLY__
......
......@@ -8,6 +8,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xa0000000)
#define PLAT_PHYS_OFFSET UL(0xa0000000)
#endif
......@@ -8,6 +8,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#include <mach/ixp2000-regs.h>
......
......@@ -17,7 +17,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x00000000)
#define PLAT_PHYS_OFFSET (0x00000000)
#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)
......
......@@ -12,7 +12,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
......
......@@ -5,6 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -18,7 +18,7 @@
/*
* Physical SRAM offset.
*/
#define PHYS_OFFSET KS8695_SDRAM_PA
#define PLAT_PHYS_OFFSET KS8695_SDRAM_PA
#ifndef __ASSEMBLY__
......
......@@ -17,7 +17,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
/*
* Sparsemem version of the above
......
......@@ -5,6 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -22,6 +22,6 @@
/*
* Physical DRAM offset of bank 0
*/
#define PHYS_OFFSET UL(0x80000000)
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif
......@@ -9,6 +9,6 @@
#ifndef __ASM_MACH_MEMORY_H
#define __ASM_MACH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif /* __ASM_MACH_MEMORY_H */
......@@ -26,11 +26,11 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/memory.h>
#include <asm/setup.h>
#include <mach/gpio.h>
#include <mach/board.h>
#include <mach/memory.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
......
......@@ -18,15 +18,15 @@
/* physical offset of RAM */
#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_ARCH_QSD8X50)
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#elif defined(CONFIG_ARCH_MSM7X30)
#define PHYS_OFFSET UL(0x00200000)
#define PLAT_PHYS_OFFSET UL(0x00200000)
#elif defined(CONFIG_ARCH_MSM8X60)
#define PHYS_OFFSET UL(0x40200000)
#define PLAT_PHYS_OFFSET UL(0x40200000)
#else
#define PHYS_OFFSET UL(0x10000000)
#define PLAT_PHYS_OFFSET UL(0x10000000)
#endif
#endif
......
......@@ -5,6 +5,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -27,6 +27,7 @@
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/memory.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/mach/irq.h>
......@@ -36,7 +37,6 @@
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/memory.h>
#include "devices-imx31.h"
#include "devices.h"
......
......@@ -20,7 +20,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x80000000)
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif
......@@ -23,6 +23,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -19,6 +19,6 @@
#define NS9XXX_CS2STAT_LENGTH UL(0x1000)
#define NS9XXX_CS3STAT_LENGTH UL(0x1000)
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -16,6 +16,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -7,6 +7,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -16,6 +16,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x80000000)
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif
......@@ -15,7 +15,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0xa0000000)
#define PLAT_PHYS_OFFSET UL(0xa0000000)
#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
void cmx2xx_pci_adjust_zones(unsigned long *size, unsigned long *holes);
......
......@@ -24,9 +24,9 @@
* Physical DRAM offset.
*/
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
#define PHYS_OFFSET UL(0x70000000)
#define PLAT_PHYS_OFFSET UL(0x70000000)
#else
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
#if !defined(__ASSEMBLY__) && defined(CONFIG_ZONE_DMA)
......
......@@ -21,7 +21,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x10000000)
#define PLAT_PHYS_OFFSET UL(0x10000000)
/*
* Cache flushing area - ROM
......
......@@ -15,6 +15,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x0C000000)
#define PLAT_PHYS_OFFSET UL(0x0C000000)
#endif
......@@ -11,6 +11,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x30000000)
#define PLAT_PHYS_OFFSET UL(0x30000000)
#endif
......@@ -11,7 +11,7 @@
#ifndef __ASM_ARCH_24A0_MEMORY_H
#define __ASM_ARCH_24A0_MEMORY_H __FILE__
#define PHYS_OFFSET UL(0x10000000)
#define PLAT_PHYS_OFFSET UL(0x10000000)
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
......
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x50000000)
#define PLAT_PHYS_OFFSET UL(0x50000000)
#define CONSISTENT_DMA_SIZE SZ_8M
......
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE SZ_8M
#endif /* __ASM_ARCH_MEMORY_H */
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H __FILE__
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE SZ_8M
#endif /* __ASM_ARCH_MEMORY_H */
......@@ -13,6 +13,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#endif
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
/*
......
......@@ -13,7 +13,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H __FILE__
#define PHYS_OFFSET UL(0x40000000)
#define PLAT_PHYS_OFFSET UL(0x40000000)
/* Maximum of 256MiB in one bank */
#define MAX_PHYSMEM_BITS 32
......
......@@ -12,7 +12,7 @@
/*
* Physical DRAM offset is 0xc0000000 on the SA1100
*/
#define PHYS_OFFSET UL(0xc0000000)
#define PLAT_PHYS_OFFSET UL(0xc0000000)
#ifndef __ASSEMBLY__
......
......@@ -15,7 +15,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x08000000)
#define PLAT_PHYS_OFFSET UL(0x08000000)
#ifndef __ASSEMBLY__
......
#ifndef __ASM_MACH_MEMORY_H
#define __ASM_MACH_MEMORY_H
#define PHYS_OFFSET UL(CONFIG_MEMORY_START)
#define PLAT_PHYS_OFFSET UL(CONFIG_MEMORY_START)
#define MEM_SIZE UL(CONFIG_MEMORY_SIZE)
/* DMA memory at 0xf6000000 - 0xffdfffff */
......
......@@ -22,7 +22,7 @@
#define __MACH_TEGRA_MEMORY_H
/* physical offset of RAM */
#define PHYS_OFFSET UL(0)
#define PLAT_PHYS_OFFSET UL(0)
#endif
......@@ -15,17 +15,17 @@
#ifdef CONFIG_MACH_U300_DUAL_RAM
#define PHYS_OFFSET UL(0x48000000)
#define PLAT_PHYS_OFFSET UL(0x48000000)
#define BOOT_PARAMS_OFFSET (PHYS_OFFSET + 0x100)
#else
#ifdef CONFIG_MACH_U300_2MB_ALIGNMENT_FIX
#define PHYS_OFFSET (0x28000000 + \
#define PLAT_PHYS_OFFSET (0x28000000 + \
(CONFIG_MACH_U300_ACCESS_MEM_SIZE - \
(CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)
#else
#define PHYS_OFFSET (0x28000000 + \
#define PLAT_PHYS_OFFSET (0x28000000 + \
(CONFIG_MACH_U300_ACCESS_MEM_SIZE + \
(CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)
#endif
......
......@@ -19,9 +19,9 @@
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/platform.h>
#include <mach/memory.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/memory.h>
static void __init u300_reserve(void)
{
......
......@@ -12,7 +12,7 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x00000000)
#endif
......@@ -23,6 +23,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -20,6 +20,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x60000000)
#define PLAT_PHYS_OFFSET UL(0x60000000)
#endif
......@@ -18,6 +18,6 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif
......@@ -23,23 +23,23 @@
#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
# if defined CONFIG_ARCH_MX1
# define PHYS_OFFSET MX1_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
# elif defined CONFIG_MACH_MX21
# define PHYS_OFFSET MX21_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX25
# define PHYS_OFFSET MX25_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET
# elif defined CONFIG_MACH_MX27
# define PHYS_OFFSET MX27_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX3
# define PHYS_OFFSET MX3x_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET
# elif defined CONFIG_ARCH_MXC91231
# define PHYS_OFFSET MXC91231_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MXC91231_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX50
# define PHYS_OFFSET MX50_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX51
# define PHYS_OFFSET MX51_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX53
# define PHYS_OFFSET MX53_PHYS_OFFSET
# define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET
# endif
#endif
......
......@@ -37,9 +37,9 @@
* Physical DRAM offset.
*/
#if defined(CONFIG_ARCH_OMAP1)
#define PHYS_OFFSET UL(0x10000000)
#define PLAT_PHYS_OFFSET UL(0x10000000)
#else
#define PHYS_OFFSET UL(0x80000000)
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif
/*
......
......@@ -15,6 +15,6 @@
#define __PLAT_MEMORY_H
/* Physical DRAM offset */
#define PHYS_OFFSET UL(0x00000000)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif /* __PLAT_MEMORY_H */
......@@ -17,6 +17,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x40000000)
#define PLAT_PHYS_OFFSET UL(0x40000000)
#endif
......@@ -13,6 +13,6 @@
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x20000000)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#endif
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