Commit f5dc5861 authored by James Hogan's avatar James Hogan Committed by Greg Kroah-Hartman

MIPS: Fix mips_atomic_set() with EVA

commit 4915e1b0 upstream.

EVA linked loads (LLE) and conditional stores (SCE) should be used on
EVA kernels for the MIPS_ATOMIC_SET operation of the sysmips system
call, or else the atomic set will apply to the kernel view of the
virtual address space (potentially unmapped on EVA kernels) rather than
the user view (TLB mapped).
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16151/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e742bca1
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <linux/sched/task_stack.h> #include <linux/sched/task_stack.h>
#include <asm/asm.h> #include <asm/asm.h>
#include <asm/asm-eva.h>
#include <asm/branch.h> #include <asm/branch.h>
#include <asm/cachectl.h> #include <asm/cachectl.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
...@@ -131,9 +132,11 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) ...@@ -131,9 +132,11 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
__asm__ __volatile__ ( __asm__ __volatile__ (
" .set "MIPS_ISA_ARCH_LEVEL" \n" " .set "MIPS_ISA_ARCH_LEVEL" \n"
" li %[err], 0 \n" " li %[err], 0 \n"
"1: ll %[old], (%[addr]) \n" "1: \n"
user_ll("%[old]", "(%[addr])")
" move %[tmp], %[new] \n" " move %[tmp], %[new] \n"
"2: sc %[tmp], (%[addr]) \n" "2: \n"
user_sc("%[tmp]", "(%[addr])")
" beqz %[tmp], 4f \n" " beqz %[tmp], 4f \n"
"3: \n" "3: \n"
" .insn \n" " .insn \n"
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment