Commit f5f54d00 authored by Sungbo Eo's avatar Sungbo Eo Committed by Matthias Brugger

arm: dts: mt7623: add musb device nodes

MT7623 has an musb controller that is compatible with the one from MT2701.
Signed-off-by: default avatarSungbo Eo <mans0n@gorani.run>
Tested-by: default avatarFrank Wunderlich <frank-w@public-files.de>
Reviewed-by: default avatarChunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210830155903.13907-2-mans0n@gorani.runSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 6880fa6c
......@@ -585,6 +585,39 @@ spi2: spi@11017000 {
status = "disabled";
};
usb0: usb@11200000 {
compatible = "mediatek,mt7623-musb",
"mediatek,mtk-musb";
reg = <0 0x11200000 0 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "mc";
phys = <&u2port2 PHY_TYPE_USB2>;
dr_mode = "otg";
clocks = <&pericfg CLK_PERI_USB0>,
<&pericfg CLK_PERI_USB0_MCU>,
<&pericfg CLK_PERI_USB_SLV>;
clock-names = "main","mcu","univpll";
power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
status = "disabled";
};
u2phy1: t-phy@11210000 {
compatible = "mediatek,mt7623-tphy",
"mediatek,generic-tphy-v1";
reg = <0 0x11210000 0 0x0800>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "disabled";
u2port2: usb-phy@11210800 {
reg = <0 0x11210800 0 0x0100>;
clocks = <&topckgen CLK_TOP_USB_PHY48M>;
clock-names = "ref";
#phy-cells = <1>;
};
};
audsys: clock-controller@11220000 {
compatible = "mediatek,mt7623-audsys",
"mediatek,mt2701-audsys",
......
......@@ -35,6 +35,10 @@ &scpsys {
clock-names = "ethif";
};
&usb0 {
power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
};
&usb1 {
power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
};
......
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