Commit f6d5ffaf authored by Mikulas Patocka's avatar Mikulas Patocka Committed by Greg Kroah-Hartman

x86/mm/pat: Don't report PAT on CPUs that don't support it

commit 99c13b8c upstream.

The pat_enabled() logic is broken on CPUs which do not support PAT and
where the initialization code fails to call pat_init(). Due to that the
enabled flag stays true and pat_enabled() returns true wrongfully.

As a consequence the mappings, e.g. for Xorg, are set up with the wrong
caching mode and the required MTRR setups are omitted.

To cure this the following changes are required:

  1) Make pat_enabled() return true only if PAT initialization was
     invoked and successful.

  2) Invoke init_cache_modes() unconditionally in setup_arch() and
     remove the extra callsites in pat_disable() and the pat disabled
     code path in pat_init().

Also rename __pat_enabled to pat_disabled to reflect the real purpose of
this variable.

Fixes: 9cd25aac ("x86/mm/pat: Emulate PAT when it is disabled")
Signed-off-by: default avatarMikulas Patocka <mpatocka@redhat.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Bernhard Held <berny156@gmx.de>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: "Luis R. Rodriguez" <mcgrof@suse.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/alpine.LRH.2.02.1707041749300.3456@file01.intranet.prod.int.rdu2.redhat.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 2f7921d8
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
bool pat_enabled(void); bool pat_enabled(void);
void pat_disable(const char *reason); void pat_disable(const char *reason);
extern void pat_init(void); extern void pat_init(void);
extern void init_cache_modes(void);
extern int reserve_memtype(u64 start, u64 end, extern int reserve_memtype(u64 start, u64 end,
enum page_cache_mode req_pcm, enum page_cache_mode *ret_pcm); enum page_cache_mode req_pcm, enum page_cache_mode *ret_pcm);
......
...@@ -1079,6 +1079,13 @@ void __init setup_arch(char **cmdline_p) ...@@ -1079,6 +1079,13 @@ void __init setup_arch(char **cmdline_p)
max_possible_pfn = max_pfn; max_possible_pfn = max_pfn;
/*
* This call is required when the CPU does not support PAT. If
* mtrr_bp_init() invoked it already via pat_init() the call has no
* effect.
*/
init_cache_modes();
/* /*
* Define random base addresses for memory sections after max_pfn is * Define random base addresses for memory sections after max_pfn is
* defined and before each memory section base is used. * defined and before each memory section base is used.
......
...@@ -36,14 +36,14 @@ ...@@ -36,14 +36,14 @@
#undef pr_fmt #undef pr_fmt
#define pr_fmt(fmt) "" fmt #define pr_fmt(fmt) "" fmt
static bool boot_cpu_done; static bool __read_mostly boot_cpu_done;
static bool __read_mostly pat_disabled = !IS_ENABLED(CONFIG_X86_PAT);
static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT); static bool __read_mostly pat_initialized;
static void init_cache_modes(void); static bool __read_mostly init_cm_done;
void pat_disable(const char *reason) void pat_disable(const char *reason)
{ {
if (!__pat_enabled) if (pat_disabled)
return; return;
if (boot_cpu_done) { if (boot_cpu_done) {
...@@ -51,10 +51,8 @@ void pat_disable(const char *reason) ...@@ -51,10 +51,8 @@ void pat_disable(const char *reason)
return; return;
} }
__pat_enabled = 0; pat_disabled = true;
pr_info("x86/PAT: %s\n", reason); pr_info("x86/PAT: %s\n", reason);
init_cache_modes();
} }
static int __init nopat(char *str) static int __init nopat(char *str)
...@@ -66,7 +64,7 @@ early_param("nopat", nopat); ...@@ -66,7 +64,7 @@ early_param("nopat", nopat);
bool pat_enabled(void) bool pat_enabled(void)
{ {
return !!__pat_enabled; return pat_initialized;
} }
EXPORT_SYMBOL_GPL(pat_enabled); EXPORT_SYMBOL_GPL(pat_enabled);
...@@ -204,6 +202,8 @@ static void __init_cache_modes(u64 pat) ...@@ -204,6 +202,8 @@ static void __init_cache_modes(u64 pat)
update_cache_mode_entry(i, cache); update_cache_mode_entry(i, cache);
} }
pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg); pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
init_cm_done = true;
} }
#define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
...@@ -224,6 +224,7 @@ static void pat_bsp_init(u64 pat) ...@@ -224,6 +224,7 @@ static void pat_bsp_init(u64 pat)
} }
wrmsrl(MSR_IA32_CR_PAT, pat); wrmsrl(MSR_IA32_CR_PAT, pat);
pat_initialized = true;
__init_cache_modes(pat); __init_cache_modes(pat);
} }
...@@ -241,10 +242,9 @@ static void pat_ap_init(u64 pat) ...@@ -241,10 +242,9 @@ static void pat_ap_init(u64 pat)
wrmsrl(MSR_IA32_CR_PAT, pat); wrmsrl(MSR_IA32_CR_PAT, pat);
} }
static void init_cache_modes(void) void init_cache_modes(void)
{ {
u64 pat = 0; u64 pat = 0;
static int init_cm_done;
if (init_cm_done) if (init_cm_done)
return; return;
...@@ -286,8 +286,6 @@ static void init_cache_modes(void) ...@@ -286,8 +286,6 @@ static void init_cache_modes(void)
} }
__init_cache_modes(pat); __init_cache_modes(pat);
init_cm_done = 1;
} }
/** /**
...@@ -305,10 +303,8 @@ void pat_init(void) ...@@ -305,10 +303,8 @@ void pat_init(void)
u64 pat; u64 pat;
struct cpuinfo_x86 *c = &boot_cpu_data; struct cpuinfo_x86 *c = &boot_cpu_data;
if (!pat_enabled()) { if (pat_disabled)
init_cache_modes();
return; return;
}
if ((c->x86_vendor == X86_VENDOR_INTEL) && if ((c->x86_vendor == X86_VENDOR_INTEL) &&
(((c->x86 == 0x6) && (c->x86_model <= 0xd)) || (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
......
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