Commit f6e856e7 authored by Aaron Liu's avatar Aaron Liu Committed by Alex Deucher

drm/amdgpu: update ta_secureDisplay_if.h to v27.00.00.08

1. Rename securedisplay_cmd to ta_securedisplay_cmd.
2. Rename ta_securedisplay_max_phy to ta_securedisplay_phy_ID.
3. update securedisplay_cmd to ta_securedisplay_cmd
Signed-off-by: default avatarAaron Liu <aaron.liu@amd.com>
Signed-off-by: default avatarShane Xiao <shane.xiao@amd.com>
Reviewed-by: default avatarAlan Liu <HaoPing.Liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3693c1ae
...@@ -1907,7 +1907,7 @@ int psp_rap_invoke(struct psp_context *psp, uint32_t ta_cmd_id, enum ta_rap_stat ...@@ -1907,7 +1907,7 @@ int psp_rap_invoke(struct psp_context *psp, uint32_t ta_cmd_id, enum ta_rap_stat
static int psp_securedisplay_initialize(struct psp_context *psp) static int psp_securedisplay_initialize(struct psp_context *psp)
{ {
int ret; int ret;
struct securedisplay_cmd *securedisplay_cmd; struct ta_securedisplay_cmd *securedisplay_cmd;
/* /*
* TODO: bypass the initialize in sriov for now * TODO: bypass the initialize in sriov for now
......
...@@ -77,11 +77,11 @@ void psp_securedisplay_parse_resp_status(struct psp_context *psp, ...@@ -77,11 +77,11 @@ void psp_securedisplay_parse_resp_status(struct psp_context *psp,
} }
} }
void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd, void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct ta_securedisplay_cmd **cmd,
enum ta_securedisplay_command command_id) enum ta_securedisplay_command command_id)
{ {
*cmd = (struct securedisplay_cmd *)psp->securedisplay_context.context.mem_context.shared_buf; *cmd = (struct ta_securedisplay_cmd *)psp->securedisplay_context.context.mem_context.shared_buf;
memset(*cmd, 0, sizeof(struct securedisplay_cmd)); memset(*cmd, 0, sizeof(struct ta_securedisplay_cmd));
(*cmd)->status = TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE; (*cmd)->status = TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE;
(*cmd)->cmd_id = command_id; (*cmd)->cmd_id = command_id;
} }
...@@ -93,7 +93,7 @@ static ssize_t amdgpu_securedisplay_debugfs_write(struct file *f, const char __u ...@@ -93,7 +93,7 @@ static ssize_t amdgpu_securedisplay_debugfs_write(struct file *f, const char __u
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private; struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
struct psp_context *psp = &adev->psp; struct psp_context *psp = &adev->psp;
struct securedisplay_cmd *securedisplay_cmd; struct ta_securedisplay_cmd *securedisplay_cmd;
struct drm_device *dev = adev_to_drm(adev); struct drm_device *dev = adev_to_drm(adev);
uint32_t phy_id; uint32_t phy_id;
uint32_t op; uint32_t op;
......
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev); void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev);
void psp_securedisplay_parse_resp_status(struct psp_context *psp, void psp_securedisplay_parse_resp_status(struct psp_context *psp,
enum ta_securedisplay_status status); enum ta_securedisplay_status status);
void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd, void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct ta_securedisplay_cmd **cmd,
enum ta_securedisplay_command command_id); enum ta_securedisplay_command command_id);
#endif #endif
...@@ -55,10 +55,10 @@ enum ta_securedisplay_status { ...@@ -55,10 +55,10 @@ enum ta_securedisplay_status {
TA_SECUREDISPLAY_STATUS__MAX = 0x7FFFFFFF,/* Maximum Value for status*/ TA_SECUREDISPLAY_STATUS__MAX = 0x7FFFFFFF,/* Maximum Value for status*/
}; };
/** @enum ta_securedisplay_max_phy /** @enum ta_securedisplay_phy_ID
* Physical ID number to use for reading corresponding DIO Scratch register for ROI * Physical ID number to use for reading corresponding DIO Scratch register for ROI
*/ */
enum ta_securedisplay_max_phy { enum ta_securedisplay_phy_ID {
TA_SECUREDISPLAY_PHY0 = 0, TA_SECUREDISPLAY_PHY0 = 0,
TA_SECUREDISPLAY_PHY1 = 1, TA_SECUREDISPLAY_PHY1 = 1,
TA_SECUREDISPLAY_PHY2 = 2, TA_SECUREDISPLAY_PHY2 = 2,
...@@ -139,16 +139,16 @@ union ta_securedisplay_cmd_output { ...@@ -139,16 +139,16 @@ union ta_securedisplay_cmd_output {
uint32_t reserved[4]; uint32_t reserved[4];
}; };
/** @struct securedisplay_cmd /** @struct ta_securedisplay_cmd
* Secure Display Command which is shared buffer memory * Secure display command which is shared buffer memory
*/ */
struct securedisplay_cmd { struct ta_securedisplay_cmd {
uint32_t cmd_id; /* +0 Bytes Command ID */ uint32_t cmd_id; /**< +0 Bytes Command ID */
enum ta_securedisplay_status status; /* +4 Bytes Status of Secure Display TA */ enum ta_securedisplay_status status; /**< +4 Bytes Status code returned by the secure display TA */
uint32_t reserved[2]; /* +8 Bytes Reserved */ uint32_t reserved[2]; /**< +8 Bytes Reserved */
union ta_securedisplay_cmd_input securedisplay_in_message; /* +16 Bytes Input Buffer */ union ta_securedisplay_cmd_input securedisplay_in_message; /**< +16 Bytes Command input buffer */
union ta_securedisplay_cmd_output securedisplay_out_message;/* +32 Bytes Output Buffer */ union ta_securedisplay_cmd_output securedisplay_out_message; /**< +32 Bytes Command output buffer */
/**@note Total 48 Bytes */ /**@note Total 48 Bytes */
}; };
#endif //_TA_SECUREDISPLAY_IF_H #endif //_TA_SECUREDISPLAY_IF_H
......
...@@ -103,7 +103,7 @@ static void amdgpu_dm_crtc_notify_ta_to_read(struct work_struct *work) ...@@ -103,7 +103,7 @@ static void amdgpu_dm_crtc_notify_ta_to_read(struct work_struct *work)
{ {
struct secure_display_context *secure_display_ctx; struct secure_display_context *secure_display_ctx;
struct psp_context *psp; struct psp_context *psp;
struct securedisplay_cmd *securedisplay_cmd; struct ta_securedisplay_cmd *securedisplay_cmd;
struct drm_crtc *crtc; struct drm_crtc *crtc;
struct dc_stream_state *stream; struct dc_stream_state *stream;
uint8_t phy_inst; uint8_t phy_inst;
......
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