Commit f73128f4 authored by Joel Stanley's avatar Joel Stanley Committed by Benjamin Herrenschmidt

powerpc/kvm: Remove redundant save of SIER AND MMCR2

These two registers are already saved in the block above. Aside from
being unnecessary, by the time we get down to the second save location
r8 no longer contains MMCR2, so we are clobbering the saved value with
PMC5.

MMCR2 primarily consists of counter freeze bits. So restoring the value
of PMC5 into MMCR2 will most likely have the effect of freezing
counters.

Fixes: 72cde5a8 ("KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
Acked-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Acked-by: default avatarPaul Mackerras <paulus@samba.org>
Reviewed-by: default avatarAlexander Graf <agraf@suse.de>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent c733cf83
...@@ -127,11 +127,6 @@ BEGIN_FTR_SECTION ...@@ -127,11 +127,6 @@ BEGIN_FTR_SECTION
stw r10, HSTATE_PMC + 24(r13) stw r10, HSTATE_PMC + 24(r13)
stw r11, HSTATE_PMC + 28(r13) stw r11, HSTATE_PMC + 28(r13)
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
BEGIN_FTR_SECTION
mfspr r9, SPRN_SIER
std r8, HSTATE_MMCR + 40(r13)
std r9, HSTATE_MMCR + 48(r13)
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
31: 31:
/* /*
......
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