Commit f77d1a49 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher

drm/amd/display: fix a regression in blank pixel data caused by coding mistake

[why]
There was unfortunately a coding mistake. It gets caught with an ultrawide monitor
that requires ODM 4:1 combine. We are blanking or unblanking pixel data we
are supposed to enumerate through all ODM pipes and program DPG for each
of those pipes. However the coding mistake causes us to program only the
first and last ODM pipes.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarMartin Leung <martin.leung@amd.com>
Acked-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 664c3b03
......@@ -1084,7 +1084,7 @@ void dcn20_blank_pixel_data(
while (odm_pipe->next_odm_pipe) {
dc->hwss.set_disp_pattern_generator(dc,
pipe_ctx,
odm_pipe,
test_pattern,
test_pattern_color_space,
stream->timing.display_color_depth,
......
......@@ -513,7 +513,7 @@ static void set_crtc_test_pattern(struct dc_link *link,
odm_opp = odm_pipe->stream_res.opp;
odm_opp->funcs->opp_program_bit_depth_reduction(odm_opp, &params);
link->dc->hwss.set_disp_pattern_generator(link->dc,
pipe_ctx,
odm_pipe,
controller_test_pattern,
controller_color_space,
color_depth,
......
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