Commit f7bc6e42 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Tony Luck

drivers: remove the SGI SN2 IOC4 base support

The IOC4 is a multi-function chip seen on SGI SN2 and some SGI MIPS
systems.  This removes the base driver, which while not having an SN2
Kconfig dependency was only for sub-drivers that had one.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Link: https://lkml.kernel.org/r/20190813072514.23299-15-hch@lst.deSigned-off-by: default avatarTony Luck <tony.luck@intel.com>
parent c9fa9c32
====================================
SGI IOC4 PCI (multi function) device
====================================
The SGI IOC4 PCI device is a bit of a strange beast, so some notes on
it are in order.
First, even though the IOC4 performs multiple functions, such as an
IDE controller, a serial controller, a PS/2 keyboard/mouse controller,
and an external interrupt mechanism, it's not implemented as a
multifunction device. The consequence of this from a software
standpoint is that all these functions share a single IRQ, and
they can't all register to own the same PCI device ID. To make
matters a bit worse, some of the register blocks (and even registers
themselves) present in IOC4 are mixed-purpose between these several
functions, meaning that there's no clear "owning" device driver.
The solution is to organize the IOC4 driver into several independent
drivers, "ioc4", "sgiioc4", and "ioc4_serial". Note that there is no
PS/2 controller driver as this functionality has never been wired up
on a shipping IO card.
ioc4
====
This is the core (or shim) driver for IOC4. It is responsible for
initializing the basic functionality of the chip, and allocating
the PCI resources that are shared between the IOC4 functions.
This driver also provides registration functions that the other
IOC4 drivers can call to make their presence known. Each driver
needs to provide a probe and remove function, which are invoked
by the core driver at appropriate times. The interface of these
IOC4 function probe and remove operations isn't precisely the same
as PCI device probe and remove operations, but is logically the
same operation.
sgiioc4
=======
This is the IDE driver for IOC4. Its name isn't very descriptive
simply for historical reasons (it used to be the only IOC4 driver
component). There's not much to say about it other than it hooks
up to the ioc4 driver via the appropriate registration, probe, and
remove functions.
ioc4_serial
===========
This is the serial driver for IOC4. There's not much to say about it
other than it hooks up to the ioc4 driver via the appropriate registration,
probe, and remove functions.
......@@ -44,7 +44,6 @@ CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_SGI_IOC4=y
CONFIG_SGI_XP=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
......
......@@ -36,7 +36,6 @@ CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_SGI_IOC4=y
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_IDE_GENERIC=y
......
......@@ -103,7 +103,6 @@ CONFIG_FW_LOADER=m
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_SGI_IOC4=m
CONFIG_EEPROM_LEGACY=y
CONFIG_EEPROM_MAX6875=y
CONFIG_IDE=y
......
......@@ -46,7 +46,6 @@ CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
CONFIG_SGI_IOC4=y
CONFIG_RAID_ATTRS=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
......
......@@ -117,7 +117,6 @@ CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP=y
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_SGI_IOC4=m
CONFIG_SCSI=m
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=m
......
......@@ -198,7 +198,6 @@ CONFIG_BLK_DEV_SX8=m
CONFIG_BLK_DEV_RAM=m
CONFIG_CDROM_PKTCDVD=m
CONFIG_ATA_OVER_ETH=m
CONFIG_SGI_IOC4=m
CONFIG_RAID_ATTRS=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
......
......@@ -49,7 +49,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=9220
CONFIG_CDROM_PKTCDVD=m
CONFIG_ATA_OVER_ETH=m
CONFIG_SGI_IOC4=m
CONFIG_IDE=y
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=y
......
......@@ -126,18 +126,6 @@ config INTEL_MID_PTI
an Intel Atom (non-netbook) mobile device containing a MIPI
P1149.7 standard implementation.
config SGI_IOC4
tristate "SGI IOC4 Base IO support"
depends on PCI
---help---
This option enables basic support for the IOC4 chip on certain
SGI IO controller cards (IO9, IO10, and PCI-RT). This option
does not enable any specific functions on such a card, but provides
necessary infrastructure for other drivers to utilize.
If you have an SGI Altix with an IOC4-based card say Y.
Otherwise say N.
config TIFM_CORE
tristate "TI Flash Media interface support"
depends on PCI
......
......@@ -21,7 +21,6 @@ obj-$(CONFIG_QCOM_COINCELL) += qcom-coincell.o
obj-$(CONFIG_QCOM_FASTRPC) += fastrpc.o
obj-$(CONFIG_SENSORS_BH1770) += bh1770glc.o
obj-$(CONFIG_SENSORS_APDS990X) += apds990x.o
obj-$(CONFIG_SGI_IOC4) += ioc4.o
obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o
obj-$(CONFIG_KGDB_TESTS) += kgdbts.o
obj-$(CONFIG_SGI_XP) += sgi-xp/
......
This diff is collapsed.
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
*/
#ifndef _LINUX_IOC4_H
#define _LINUX_IOC4_H
#include <linux/interrupt.h>
/***************
* Definitions *
***************/
/* Miscellaneous values inherent to hardware */
#define IOC4_EXTINT_COUNT_DIVISOR 520 /* PCI clocks per COUNT tick */
/***********************************
* Structures needed by subdrivers *
***********************************/
/* This structure fully describes the IOC4 miscellaneous registers which
* appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
* PCI resource is managed by the main IOC4 driver because it contains
* registers of interest to many different IOC4 subdrivers.
*/
struct ioc4_misc_regs {
/* Miscellaneous IOC4 registers */
union ioc4_pci_err_addr_l {
uint32_t raw;
struct {
uint32_t valid:1; /* Address captured */
uint32_t master_id:4; /* Unit causing error
* 0/1: Serial port 0 TX/RX
* 2/3: Serial port 1 TX/RX
* 4/5: Serial port 2 TX/RX
* 6/7: Serial port 3 TX/RX
* 8: ATA/ATAPI
* 9-15: Undefined
*/
uint32_t mul_err:1; /* Multiple errors occurred */
uint32_t addr:26; /* Bits 31-6 of error addr */
} fields;
} pci_err_addr_l;
uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
union ioc4_sio_int {
uint32_t raw;
struct {
uint8_t tx_mt:1; /* TX ring buffer empty */
uint8_t rx_full:1; /* RX ring buffer full */
uint8_t rx_high:1; /* RX high-water exceeded */
uint8_t rx_timer:1; /* RX timer has triggered */
uint8_t delta_dcd:1; /* DELTA_DCD seen */
uint8_t delta_cts:1; /* DELTA_CTS seen */
uint8_t intr_pass:1; /* Interrupt pass-through */
uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
} fields[4];
} sio_ir; /* Serial interrupt state */
union ioc4_other_int {
uint32_t raw;
struct {
uint32_t ata_int:1; /* ATA port passthru */
uint32_t ata_memerr:1; /* ATA halted by mem error */
uint32_t memerr:4; /* Serial halted by mem err */
uint32_t kbd_int:1; /* kbd/mouse intr asserted */
uint32_t reserved:16; /* zero */
uint32_t rt_int:1; /* INT_OUT section latch */
uint32_t gen_int:8; /* Intr. from generic pins */
} fields;
} other_ir; /* Other interrupt state */
union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
union ioc4_other_int other_ies; /* Other interrupt enable set */
union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
union ioc4_other_int other_iec; /* Other interrupt enable clear */
union ioc4_sio_cr {
uint32_t raw;
struct {
uint32_t cmd_pulse:4; /* Bytebus strobe width */
uint32_t arb_diag:3; /* PCI bus requester */
uint32_t sio_diag_idle:1; /* Active ser req? */
uint32_t ata_diag_idle:1; /* Active ATA req? */
uint32_t ata_diag_active:1; /* ATA req is winner */
uint32_t reserved:22; /* zero */
} fields;
} sio_cr;
uint32_t unused1;
union ioc4_int_out {
uint32_t raw;
struct {
uint32_t count:16; /* Period control */
uint32_t mode:3; /* Output signal shape */
uint32_t reserved:11; /* zero */
uint32_t diag:1; /* Timebase control */
uint32_t int_out:1; /* Current value */
} fields;
} int_out; /* External interrupt output control */
uint32_t unused2;
union ioc4_gpcr {
uint32_t raw;
struct {
uint32_t dir:8; /* Pin direction */
uint32_t edge:8; /* Edge/level mode */
uint32_t reserved1:4; /* zero */
uint32_t int_out_en:1; /* INT_OUT enable */
uint32_t reserved2:11; /* zero */
} fields;
} gpcr_s; /* Generic PIO control set */
union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
union ioc4_gpdr {
uint32_t raw;
struct {
uint32_t gen_pin:8; /* State of pins */
uint32_t reserved:24;
} fields;
} gpdr; /* Generic PIO data */
uint32_t unused3;
union ioc4_gppr {
uint32_t raw;
struct {
uint32_t gen_pin:1; /* Single pin state */
uint32_t reserved:31;
} fields;
} gppr[8]; /* Generic PIO pins */
};
/* Masks for GPCR DIR pins */
#define IOC4_GPCR_DIR_0 0x01 /* External interrupt output */
#define IOC4_GPCR_DIR_1 0x02 /* External interrupt input */
#define IOC4_GPCR_DIR_2 0x04
#define IOC4_GPCR_DIR_3 0x08 /* Keyboard/mouse presence */
#define IOC4_GPCR_DIR_4 0x10 /* Ser. port 0 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_5 0x20 /* Ser. port 1 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_6 0x40 /* Ser. port 2 xcvr select (0=232, 1=422) */
#define IOC4_GPCR_DIR_7 0x80 /* Ser. port 3 xcvr select (0=232, 1=422) */
/* Masks for GPCR EDGE pins */
#define IOC4_GPCR_EDGE_0 0x01
#define IOC4_GPCR_EDGE_1 0x02 /* External interrupt input */
#define IOC4_GPCR_EDGE_2 0x04
#define IOC4_GPCR_EDGE_3 0x08
#define IOC4_GPCR_EDGE_4 0x10
#define IOC4_GPCR_EDGE_5 0x20
#define IOC4_GPCR_EDGE_6 0x40
#define IOC4_GPCR_EDGE_7 0x80
#define IOC4_VARIANT_IO9 0x0900
#define IOC4_VARIANT_PCI_RT 0x0901
#define IOC4_VARIANT_IO10 0x1000
/* One of these per IOC4 */
struct ioc4_driver_data {
struct list_head idd_list;
unsigned long idd_bar0;
struct pci_dev *idd_pdev;
const struct pci_device_id *idd_pci_id;
struct ioc4_misc_regs __iomem *idd_misc_regs;
unsigned long count_period;
void *idd_serial_data;
unsigned int idd_variant;
};
/* One per submodule */
struct ioc4_submodule {
struct list_head is_list;
char *is_name;
struct module *is_owner;
int (*is_probe) (struct ioc4_driver_data *);
int (*is_remove) (struct ioc4_driver_data *);
};
#define IOC4_NUM_CARDS 8 /* max cards per partition */
/**********************************
* Functions needed by submodules *
**********************************/
extern int ioc4_register_submodule(struct ioc4_submodule *);
extern void ioc4_unregister_submodule(struct ioc4_submodule *);
#endif /* _LINUX_IOC4_H */
......@@ -1070,7 +1070,6 @@
#define PCI_VENDOR_ID_SGI 0x10a9
#define PCI_DEVICE_ID_SGI_IOC3 0x0003
#define PCI_DEVICE_ID_SGI_LITHIUM 0x1002
#define PCI_DEVICE_ID_SGI_IOC4 0x100a
#define PCI_VENDOR_ID_WINBOND 0x10ad
#define PCI_DEVICE_ID_WINBOND_82C105 0x0105
......
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