Commit f7e18022 authored by Xing Zheng's avatar Xing Zheng Committed by David S. Miller

clk: rockchip: add clock-id for rk3036 emac pll source clock

Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.
Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e764b939
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#define SCLK_PVTM_VIDEO 125 #define SCLK_PVTM_VIDEO 125
#define SCLK_MAC 151 #define SCLK_MAC 151
#define SCLK_MACREF 152 #define SCLK_MACREF 152
#define SCLK_MACPLL 153
#define SCLK_SFC 160 #define SCLK_SFC 160
/* aclk gates */ /* aclk gates */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment