Commit f86ad3e0 authored by Mark Hairgrove's avatar Mark Hairgrove Committed by Michael Ellerman

powerpc/powernv/npu: Remove atsd_threshold debugfs setting

This threshold is no longer used now that all invalidates issue a single
ATSD to each active NPU.
Signed-off-by: default avatarMark Hairgrove <mhairgrove@nvidia.com>
Reviewed-by: default avatarAlistair Popple <alistair@popple.id.au>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 3689c37d
......@@ -17,7 +17,6 @@
#include <linux/pci.h>
#include <linux/memblock.h>
#include <linux/iommu.h>
#include <linux/debugfs.h>
#include <linux/sizes.h>
#include <asm/debugfs.h>
......@@ -42,14 +41,6 @@
*/
static DEFINE_SPINLOCK(npu_context_lock);
/*
* When an address shootdown range exceeds this threshold we invalidate the
* entire TLB on the GPU for the given PID rather than each specific address in
* the range.
*/
static uint64_t atsd_threshold = 2 * 1024 * 1024;
static struct dentry *atsd_threshold_dentry;
/*
* Other types of TCE cache invalidation are not functional in the
* hardware.
......@@ -966,11 +957,6 @@ int pnv_npu2_init(struct pnv_phb *phb)
static int npu_index;
uint64_t rc = 0;
if (!atsd_threshold_dentry) {
atsd_threshold_dentry = debugfs_create_x64("atsd_threshold",
0600, powerpc_debugfs_root, &atsd_threshold);
}
phb->npu.nmmu_flush =
of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush");
for_each_child_of_node(phb->hose->dn, dn) {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment