Commit f895e3db authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Move psr unlock out from the pipe update critical section

Do the PSR unlock after the vblank evade critcal section is
fully over, not before.

Cc: Manasi Navare <navaremanasi@chromium.org>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230901130440.2085-2-ville.syrjala@linux.intel.comReviewed-by: default avatarManasi Navare <navaremanasi@chromium.org>
Reviewed-by: default avatarMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
parent fc3bbd57
......@@ -646,10 +646,8 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
ktime_t end_vbl_time = ktime_get();
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
intel_psr_unlock(new_crtc_state);
if (new_crtc_state->do_async_flip)
return;
goto out;
trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
......@@ -709,7 +707,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
local_irq_enable();
if (intel_vgpu_active(dev_priv))
return;
goto out;
if (crtc->debug.start_vbl_count &&
crtc->debug.start_vbl_count != end_vbl_count) {
......@@ -724,4 +722,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
}
dbg_vblank_evade(crtc, end_vbl_time);
out:
intel_psr_unlock(new_crtc_state);
}
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