Commit f91423e9 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

    amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
parent 01ff9ff3
...@@ -418,33 +418,26 @@ exynos_usbphy: exynos-usbphy@125b0000 { ...@@ -418,33 +418,26 @@ exynos_usbphy: exynos-usbphy@125b0000 {
status = "disabled"; status = "disabled";
}; };
amba { pdma0: pdma@12680000 {
compatible = "simple-bus"; compatible = "arm,pl330", "arm,primecell";
#address-cells = <1>; reg = <0x12680000 0x1000>;
#size-cells = <1>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
ranges; clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk";
pdma0: pdma@12680000 { #dma-cells = <1>;
compatible = "arm,pl330", "arm,primecell"; #dma-channels = <8>;
reg = <0x12680000 0x1000>; #dma-requests = <32>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk"; pdma1: pdma@12690000 {
#dma-cells = <1>; compatible = "arm,pl330", "arm,primecell";
#dma-channels = <8>; reg = <0x12690000 0x1000>;
#dma-requests = <32>; interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
}; clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
pdma1: pdma@12690000 { #dma-cells = <1>;
compatible = "arm,pl330", "arm,primecell"; #dma-channels = <8>;
reg = <0x12690000 0x1000>; #dma-requests = <32>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
}; };
adc: adc@126c0000 { adc: adc@126c0000 {
......
...@@ -669,45 +669,37 @@ pwm: pwm@139d0000 { ...@@ -669,45 +669,37 @@ pwm: pwm@139d0000 {
status = "disabled"; status = "disabled";
}; };
amba: amba { pdma0: pdma@12680000 {
#address-cells = <1>; compatible = "arm,pl330", "arm,primecell";
#size-cells = <1>; reg = <0x12680000 0x1000>;
compatible = "simple-bus"; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>; clocks = <&clock CLK_PDMA0>;
ranges; clock-names = "apb_pclk";
#dma-cells = <1>;
pdma0: pdma@12680000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <32>;
reg = <0x12680000 0x1000>; };
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>; pdma1: pdma@12690000 {
clock-names = "apb_pclk"; compatible = "arm,pl330", "arm,primecell";
#dma-cells = <1>; reg = <0x12690000 0x1000>;
#dma-channels = <8>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>; clocks = <&clock CLK_PDMA1>;
}; clock-names = "apb_pclk";
#dma-cells = <1>;
pdma1: pdma@12690000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <32>;
reg = <0x12690000 0x1000>; };
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>; mdma1: mdma@12850000 {
clock-names = "apb_pclk"; compatible = "arm,pl330", "arm,primecell";
#dma-cells = <1>; reg = <0x12850000 0x1000>;
#dma-channels = <8>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>; clocks = <&clock CLK_MDMA>;
}; clock-names = "apb_pclk";
#dma-cells = <1>;
mdma1: mdma@12850000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <1>;
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
}; };
fimd: fimd@11c00000 { fimd: fimd@11c00000 {
......
...@@ -181,20 +181,6 @@ hdmi_ddc: i2c-ddc { ...@@ -181,20 +181,6 @@ hdmi_ddc: i2c-ddc {
}; };
}; };
&amba {
mdma0: mdma@12840000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12840000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
power-domains = <&pd_lcd0>;
};
};
&camera { &camera {
status = "okay"; status = "okay";
...@@ -616,6 +602,20 @@ &serial_3 { ...@@ -616,6 +602,20 @@ &serial_3 {
/delete-property/dma-names; /delete-property/dma-names;
}; };
&soc {
mdma0: mdma@12840000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12840000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
power-domains = <&pd_lcd0>;
};
};
&sysram { &sysram {
smp-sram@0 { smp-sram@0 {
status = "disabled"; status = "disabled";
......
...@@ -679,56 +679,48 @@ usb2_phy_gen: phy@12130000 { ...@@ -679,56 +679,48 @@ usb2_phy_gen: phy@12130000 {
samsung,pmureg-phandle = <&pmu_system_controller>; samsung,pmureg-phandle = <&pmu_system_controller>;
}; };
amba { pdma0: pdma@121a0000 {
#address-cells = <1>; compatible = "arm,pl330", "arm,primecell";
#size-cells = <1>; reg = <0x121A0000 0x1000>;
compatible = "simple-bus"; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>; clocks = <&clock CLK_PDMA0>;
ranges; clock-names = "apb_pclk";
#dma-cells = <1>;
pdma0: pdma@121a0000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <32>;
reg = <0x121A0000 0x1000>; };
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>; pdma1: pdma@121b0000 {
clock-names = "apb_pclk"; compatible = "arm,pl330", "arm,primecell";
#dma-cells = <1>; reg = <0x121B0000 0x1000>;
#dma-channels = <8>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>; clocks = <&clock CLK_PDMA1>;
}; clock-names = "apb_pclk";
#dma-cells = <1>;
pdma1: pdma@121b0000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <32>;
reg = <0x121B0000 0x1000>; };
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>; mdma0: mdma@10800000 {
clock-names = "apb_pclk"; compatible = "arm,pl330", "arm,primecell";
#dma-cells = <1>; reg = <0x10800000 0x1000>;
#dma-channels = <8>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>; clocks = <&clock CLK_MDMA0>;
}; clock-names = "apb_pclk";
#dma-cells = <1>;
mdma0: mdma@10800000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <1>;
reg = <0x10800000 0x1000>; };
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA0>; mdma1: mdma@11c10000 {
clock-names = "apb_pclk"; compatible = "arm,pl330", "arm,primecell";
#dma-cells = <1>; reg = <0x11C10000 0x1000>;
#dma-channels = <8>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <1>; clocks = <&clock CLK_MDMA1>;
}; clock-names = "apb_pclk";
#dma-cells = <1>;
mdma1: mdma@11c10000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <1>;
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
}; };
gsc_0: gsc@13e00000 { gsc_0: gsc@13e00000 {
......
...@@ -189,34 +189,26 @@ pinctrl_3: pinctrl@3860000 { ...@@ -189,34 +189,26 @@ pinctrl_3: pinctrl@3860000 {
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
}; };
amba { pdma0: pdma@121a0000 {
#address-cells = <1>; compatible = "arm,pl330", "arm,primecell";
#size-cells = <1>; reg = <0x121a0000 0x1000>;
compatible = "simple-bus"; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>; clocks = <&clock CLK_PDMA0>;
ranges; clock-names = "apb_pclk";
#dma-cells = <1>;
pdma0: pdma@121a0000 { #dma-channels = <8>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <32>;
reg = <0x121a0000 0x1000>; };
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@121b0000 { pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x121b0000 0x1000>; reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>; clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <32>; #dma-requests = <32>;
};
}; };
audi2s0: i2s@3830000 { audi2s0: i2s@3830000 {
......
...@@ -433,76 +433,68 @@ pinctrl_4: pinctrl@3860000 { ...@@ -433,76 +433,68 @@ pinctrl_4: pinctrl@3860000 {
power-domains = <&mau_pd>; power-domains = <&mau_pd>;
}; };
amba { adma: adma@3880000 {
#address-cells = <1>; compatible = "arm,pl330", "arm,primecell";
#size-cells = <1>; reg = <0x03880000 0x1000>;
compatible = "simple-bus"; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>; clocks = <&clock_audss EXYNOS_ADMA>;
ranges; clock-names = "apb_pclk";
#dma-cells = <1>;
adma: adma@3880000 { #dma-channels = <6>;
compatible = "arm,pl330", "arm,primecell"; #dma-requests = <16>;
reg = <0x03880000 0x1000>; power-domains = <&mau_pd>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&clock_audss EXYNOS_ADMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <6>;
#dma-requests = <16>;
power-domains = <&mau_pd>;
};
pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma0: mdma@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
mdma1: mdma@11c10000 { pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell"; compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>; reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>; clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
#dma-cells = <1>; #dma-cells = <1>;
#dma-channels = <8>; #dma-channels = <8>;
#dma-requests = <1>; #dma-requests = <32>;
/* };
* MDMA1 can support both secure and non-secure
* AXI transactions. When this is enabled in pdma1: pdma@121b0000 {
* the kernel for boards that run in secure compatible = "arm,pl330", "arm,primecell";
* mode, we are getting imprecise external reg = <0x121B0000 0x1000>;
* aborts causing the kernel to oops. interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
*/ clocks = <&clock CLK_PDMA1>;
status = "disabled"; clock-names = "apb_pclk";
}; #dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma0: mdma@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
mdma1: mdma@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
/*
* MDMA1 can support both secure and non-secure
* AXI transactions. When this is enabled in
* the kernel for boards that run in secure
* mode, we are getting imprecise external
* aborts causing the kernel to oops.
*/
status = "disabled";
}; };
i2s0: i2s@3830000 { i2s0: i2s@3830000 {
......
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