Commit fa71ae27 authored by Alexander Duyck's avatar Alexander Duyck Committed by Jeff Kirsher

ixgbevf: Move Tx clean-up into NAPI context

Currently the VF driver is processing all of the transmits in interrupt
context.  This can be messy since the Rx is all handled in NAPI and this
may result in interrupts being disabled.  In order to resolve this move all
of the Tx packet processing into NAPI and combine all of the interrupt and
polling routines into just a pair of functions.
Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: default avatarGreg Rose <gregory.v.rose@intel.com>
Tested-by: default avatarSibai Li <sibai.li@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 6b43c446
...@@ -364,7 +364,6 @@ static int ixgbevf_set_ringparam(struct net_device *netdev, ...@@ -364,7 +364,6 @@ static int ixgbevf_set_ringparam(struct net_device *netdev,
} }
goto err_tx_ring_setup; goto err_tx_ring_setup;
} }
tx_ring[i].v_idx = adapter->tx_ring[i].v_idx;
} }
memcpy(rx_ring, adapter->rx_ring, memcpy(rx_ring, adapter->rx_ring,
...@@ -380,7 +379,6 @@ static int ixgbevf_set_ringparam(struct net_device *netdev, ...@@ -380,7 +379,6 @@ static int ixgbevf_set_ringparam(struct net_device *netdev,
} }
goto err_rx_ring_setup; goto err_rx_ring_setup;
} }
rx_ring[i].v_idx = adapter->rx_ring[i].v_idx;
} }
/* /*
......
...@@ -81,11 +81,6 @@ struct ixgbevf_ring { ...@@ -81,11 +81,6 @@ struct ixgbevf_ring {
* offset associated with this ring, which is different * offset associated with this ring, which is different
* for DCB and RSS modes */ * for DCB and RSS modes */
u64 v_idx; /* maps directly to the index for this ring in the hardware
* vector array, can also be used for finding the bit in EICR
* and friends that represents the vector for this ring */
u16 work_limit; /* max work per interrupt */
u16 rx_buf_len; u16 rx_buf_len;
}; };
...@@ -140,6 +135,7 @@ struct ixgbevf_q_vector { ...@@ -140,6 +135,7 @@ struct ixgbevf_q_vector {
struct ixgbevf_ring_container rx, tx; struct ixgbevf_ring_container rx, tx;
u32 eitr; u32 eitr;
int v_idx; /* vector index in list */ int v_idx; /* vector index in list */
char name[IFNAMSIZ + 9];
}; };
/* Helper macros to switch between ints/sec and what the register uses. /* Helper macros to switch between ints/sec and what the register uses.
...@@ -167,9 +163,8 @@ struct ixgbevf_q_vector { ...@@ -167,9 +163,8 @@ struct ixgbevf_q_vector {
#define NON_Q_VECTORS (OTHER_VECTOR) #define NON_Q_VECTORS (OTHER_VECTOR)
#define MAX_MSIX_Q_VECTORS 2 #define MAX_MSIX_Q_VECTORS 2
#define MAX_MSIX_COUNT 2
#define MIN_MSIX_Q_VECTORS 2 #define MIN_MSIX_Q_VECTORS 1
#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
/* board specific private data structure */ /* board specific private data structure */
...@@ -179,7 +174,6 @@ struct ixgbevf_adapter { ...@@ -179,7 +174,6 @@ struct ixgbevf_adapter {
u16 bd_number; u16 bd_number;
struct work_struct reset_task; struct work_struct reset_task;
struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
/* Interrupt Throttle Rate */ /* Interrupt Throttle Rate */
u32 itr_setting; u32 itr_setting;
...@@ -187,6 +181,7 @@ struct ixgbevf_adapter { ...@@ -187,6 +181,7 @@ struct ixgbevf_adapter {
/* TX */ /* TX */
struct ixgbevf_ring *tx_ring; /* One per active queue */ struct ixgbevf_ring *tx_ring; /* One per active queue */
int num_tx_queues; int num_tx_queues;
u16 tx_itr_setting;
u64 restart_queue; u64 restart_queue;
u64 hw_csum_tx_good; u64 hw_csum_tx_good;
u64 lsc_int; u64 lsc_int;
...@@ -197,6 +192,7 @@ struct ixgbevf_adapter { ...@@ -197,6 +192,7 @@ struct ixgbevf_adapter {
/* RX */ /* RX */
struct ixgbevf_ring *rx_ring; /* One per active queue */ struct ixgbevf_ring *rx_ring; /* One per active queue */
int num_rx_queues; int num_rx_queues;
u16 rx_itr_setting;
u64 hw_csum_rx_error; u64 hw_csum_rx_error;
u64 hw_rx_no_dma_resources; u64 hw_rx_no_dma_resources;
u64 hw_csum_rx_good; u64 hw_csum_rx_good;
......
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