Commit fa79b8d6 authored by Chao Xie's avatar Chao Xie Committed by Haojian Zhuang

ARM: cache: add cputype.h for tauros2

Signed-off-by: default avatarChao Xie <xiechao.mail@gmail.com>
Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@gmail.com>
parent 5967b546
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/cp15.h> #include <asm/cp15.h>
#include <asm/cputype.h>
#include <asm/hardware/cache-tauros2.h> #include <asm/hardware/cache-tauros2.h>
...@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void) ...@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void)
static inline int __init cpuid_scheme(void) static inline int __init cpuid_scheme(void)
{ {
extern int processor_id;
return !!((processor_id & 0x000f0000) == 0x000f0000); return !!((processor_id & 0x000f0000) == 0x000f0000);
} }
...@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr) ...@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr)
void __init tauros2_init(void) void __init tauros2_init(void)
{ {
extern int processor_id;
char *mode = NULL; char *mode = NULL;
disable_l2_prefetch(); disable_l2_prefetch();
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment