Commit fad84e39 authored by Vineet Gupta's avatar Vineet Gupta

ARC: boot log: eliminate struct cpuinfo_arc #4: boot log per ISA

 - boot log now clearly per ISA
 - global struct cpuinfo_arc[] elimiated
 - local struct struct arcinfo kept for passing info
   between functions
Tested-by: default avatarkernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202308162101.Ve5jBg80-lkp@intel.comSigned-off-by: default avatarVineet Gupta <vgupta@kernel.org>
parent c5b678b3
...@@ -23,7 +23,7 @@ ...@@ -23,7 +23,7 @@
#define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */ #define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */
#define ARC_REG_XY_MEM_BCR 0x79 #define ARC_REG_XY_MEM_BCR 0x79
#define ARC_REG_MAC_BCR 0x7a #define ARC_REG_MAC_BCR 0x7a
#define ARC_REG_MUL_BCR 0x7b #define ARC_REG_MPY_BCR 0x7b
#define ARC_REG_SWAP_BCR 0x7c #define ARC_REG_SWAP_BCR 0x7c
#define ARC_REG_NORM_BCR 0x7d #define ARC_REG_NORM_BCR 0x7d
#define ARC_REG_MIXMAX_BCR 0x7e #define ARC_REG_MIXMAX_BCR 0x7e
...@@ -177,7 +177,7 @@ struct bcr_isa_arcv2 { ...@@ -177,7 +177,7 @@ struct bcr_isa_arcv2 {
#endif #endif
}; };
struct bcr_uarch_build_arcv2 { struct bcr_uarch_build {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:8, prod:8, maj:8, min:8; unsigned int pad:8, prod:8, maj:8, min:8;
#else #else
...@@ -355,35 +355,6 @@ struct bcr_generic { ...@@ -355,35 +355,6 @@ struct bcr_generic {
#endif #endif
}; };
/*
*******************************************************************
* Generic structures to hold build configuration used at runtime
*/
struct cpuinfo_arc_bpu {
unsigned int ver, full, num_cache, num_pred, ret_stk;
};
struct cpuinfo_arc_ccm {
unsigned int base_addr, sz;
};
struct cpuinfo_arc {
struct cpuinfo_arc_bpu bpu;
struct bcr_identity core;
struct bcr_isa_arcv2 isa;
const char *release, *name;
unsigned int vec_base;
struct cpuinfo_arc_ccm iccm, dccm;
struct {
unsigned int swap:1, norm:1, minmax:1, barrel:1, crc:1, swape:1, pad1:2,
fpu_sp:1, fpu_dp:1, dual:1, dual_enb:1, pad2:4,
ap_num:4, ap_full:1, smart:1, rtt:1, pad3:1,
timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
} extn;
struct bcr_mpy extn_mpy;
};
static inline int is_isa_arcv2(void) static inline int is_isa_arcv2(void)
{ {
return IS_ENABLED(CONFIG_ISA_ARCV2); return IS_ENABLED(CONFIG_ISA_ARCV2);
......
...@@ -35,10 +35,10 @@ long __init arc_get_mem_sz(void); ...@@ -35,10 +35,10 @@ long __init arc_get_mem_sz(void);
#define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2)) #define IS_AVAIL3(v, v2, s) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_DISABLED_RUN(v2))
extern void arc_mmu_init(void); extern void arc_mmu_init(void);
extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); extern int arc_mmu_mumbojumbo(int cpu_id, char *buf, int len);
extern void arc_cache_init(void); extern void arc_cache_init(void);
extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); extern int arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
extern void __init handle_uboot_args(void); extern void __init handle_uboot_args(void);
......
This diff is collapsed.
...@@ -39,7 +39,7 @@ void (*__dma_cache_wback_inv)(phys_addr_t start, unsigned long sz); ...@@ -39,7 +39,7 @@ void (*__dma_cache_wback_inv)(phys_addr_t start, unsigned long sz);
void (*__dma_cache_inv)(phys_addr_t start, unsigned long sz); void (*__dma_cache_inv)(phys_addr_t start, unsigned long sz);
void (*__dma_cache_wback)(phys_addr_t start, unsigned long sz); void (*__dma_cache_wback)(phys_addr_t start, unsigned long sz);
static char *read_decode_cache_bcr_arcv2(int c, char *buf, int len) static int read_decode_cache_bcr_arcv2(int c, char *buf, int len)
{ {
struct cpuinfo_arc_cache *p_slc = &slc_info; struct cpuinfo_arc_cache *p_slc = &slc_info;
struct bcr_identity ident; struct bcr_identity ident;
...@@ -94,10 +94,10 @@ static char *read_decode_cache_bcr_arcv2(int c, char *buf, int len) ...@@ -94,10 +94,10 @@ static char *read_decode_cache_bcr_arcv2(int c, char *buf, int len)
perip_base, perip_base,
IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency (per-device) ")); IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency (per-device) "));
return buf; return n;
} }
char *arc_cache_mumbojumbo(int c, char *buf, int len) int arc_cache_mumbojumbo(int c, char *buf, int len)
{ {
struct cpuinfo_arc_cache *p_ic = &ic_info, *p_dc = &dc_info; struct cpuinfo_arc_cache *p_ic = &ic_info, *p_dc = &dc_info;
struct bcr_cache ibcr, dbcr; struct bcr_cache ibcr, dbcr;
...@@ -153,9 +153,9 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len) ...@@ -153,9 +153,9 @@ char *arc_cache_mumbojumbo(int c, char *buf, int len)
slc_chk: slc_chk:
if (is_isa_arcv2()) if (is_isa_arcv2())
read_decode_cache_bcr_arcv2(c, buf + n, len - n); n += read_decode_cache_bcr_arcv2(c, buf + n, len - n);
return buf; return n;
} }
/* /*
......
...@@ -562,7 +562,7 @@ void local_flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, ...@@ -562,7 +562,7 @@ void local_flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start,
* the cpuinfo structure for later use. * the cpuinfo structure for later use.
* No Validation is done here, simply read/convert the BCRs * No Validation is done here, simply read/convert the BCRs
*/ */
char *arc_mmu_mumbojumbo(int c, char *buf, int len) int arc_mmu_mumbojumbo(int c, char *buf, int len)
{ {
struct cpuinfo_arc_mmu *mmu = &mmuinfo; struct cpuinfo_arc_mmu *mmu = &mmuinfo;
unsigned int bcr, u_dtlb, u_itlb, sasid; unsigned int bcr, u_dtlb, u_itlb, sasid;
...@@ -607,7 +607,7 @@ char *arc_mmu_mumbojumbo(int c, char *buf, int len) ...@@ -607,7 +607,7 @@ char *arc_mmu_mumbojumbo(int c, char *buf, int len)
IS_AVAIL1(sasid, ", SASID"), IS_AVAIL1(sasid, ", SASID"),
IS_AVAIL2(mmu->pae, ", PAE40 ", CONFIG_ARC_HAS_PAE40)); IS_AVAIL2(mmu->pae, ", PAE40 ", CONFIG_ARC_HAS_PAE40));
return buf; return n;
} }
int pae40_exist_but_not_enab(void) int pae40_exist_but_not_enab(void)
......
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