Commit faec5ea6 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu-dt64-4.12-3' of git://git.infradead.org/linux-mvebu into fixes

Pull "mvebu dt64 for 4.12 (part 3)" from Gregory CLEMENT:

pinctrl and GPIO description for Armada 37xx SoCs

* tag 'mvebu-dt64-4.12-3' of git://git.infradead.org/linux-mvebu:
  ARM64: dts: marvell: armada37xx: add pinctrl definition
  ARM64: dts: marvell: Add pinctrl nodes for Armada 3700
parents 9dfe29d9 6a680783
...@@ -79,6 +79,8 @@ usb3_phy: usb3-phy { ...@@ -79,6 +79,8 @@ usb3_phy: usb3-phy {
}; };
&i2c0 { &i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay"; status = "okay";
gpio_exp: pca9555@22 { gpio_exp: pca9555@22 {
...@@ -113,6 +115,8 @@ &sata { ...@@ -113,6 +115,8 @@ &sata {
&spi0 { &spi0 {
status = "okay"; status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
m25p80@0 { m25p80@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
...@@ -143,6 +147,8 @@ partition@210000 { ...@@ -143,6 +147,8 @@ partition@210000 {
/* Exported on the micro USB connector CON32 through an FTDI */ /* Exported on the micro USB connector CON32 through an FTDI */
&uart0 { &uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay"; status = "okay";
}; };
...@@ -184,6 +190,8 @@ phy1: ethernet-phy@1 { ...@@ -184,6 +190,8 @@ phy1: ethernet-phy@1 {
}; };
&eth0 { &eth0 {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
phy = <&phy0>; phy = <&phy0>;
status = "okay"; status = "okay";
......
...@@ -161,16 +161,83 @@ tbg: tbg@13200 { ...@@ -161,16 +161,83 @@ tbg: tbg@13200 {
#clock-cells = <1>; #clock-cells = <1>;
}; };
gpio1: gpio@13800 { pinctrl_nb: pinctrl@13800 {
compatible = "marvell,mvebu-gpio-3700", compatible = "marvell,armada3710-nb-pinctrl",
"syscon", "simple-mfd"; "syscon", "simple-mfd";
reg = <0x13800 0x500>; reg = <0x13800 0x100>, <0x13C00 0x20>;
gpionb: gpio {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_nb 0 0 36>;
gpio-controller;
interrupts =
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
};
xtalclk: xtal-clk { xtalclk: xtal-clk {
compatible = "marvell,armada-3700-xtal-clock"; compatible = "marvell,armada-3700-xtal-clock";
clock-output-names = "xtal"; clock-output-names = "xtal";
#clock-cells = <0>; #clock-cells = <0>;
}; };
spi_quad_pins: spi-quad-pins {
groups = "spi_quad";
function = "spi";
};
i2c1_pins: i2c1-pins {
groups = "i2c1";
function = "i2c";
};
i2c2_pins: i2c2-pins {
groups = "i2c2";
function = "i2c";
};
uart1_pins: uart1-pins {
groups = "uart1";
function = "uart";
};
uart2_pins: uart2-pins {
groups = "uart2";
function = "uart";
};
};
pinctrl_sb: pinctrl@18800 {
compatible = "marvell,armada3710-sb-pinctrl",
"syscon", "simple-mfd";
reg = <0x18800 0x100>, <0x18C00 0x20>;
gpiosb: gpio {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_sb 0 0 29>;
gpio-controller;
interrupts =
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
};
rgmii_pins: mii-pins {
groups = "rgmii";
function = "mii";
};
}; };
eth0: ethernet@30000 { eth0: ethernet@30000 {
......
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