Commit fb16d9e5 authored by Robert Jarzmik's avatar Robert Jarzmik Committed by Stephen Boyd

clk: pxa: export core clocks

pxaxxx_get_clk_frequency_khz() needs several clocks to be available
through clk_get(), ie. the cpu clocks, system bus clock and memory
clocks.

Add the missing clkdev so that their rate can be acquired.
Signed-off-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 7c514519
......@@ -189,8 +189,10 @@ RATE_RO_OPS(clk_pxa25x_cpll, "cpll");
static void __init pxa25x_register_core(void)
{
clk_register_clk_pxa25x_cpll();
clk_register_clk_pxa25x_run();
clkdev_pxa_register(CLK_NONE, "cpll", NULL,
clk_register_clk_pxa25x_cpll());
clkdev_pxa_register(CLK_NONE, "run", NULL,
clk_register_clk_pxa25x_run());
clkdev_pxa_register(CLK_CORE, "core", NULL,
clk_register_clk_pxa25x_core());
}
......@@ -212,7 +214,8 @@ static void __init pxa25x_base_clocks_init(void)
{
pxa25x_register_plls();
pxa25x_register_core();
clk_register_clk_pxa25x_memory();
clkdev_pxa_register(CLK_NONE, "system_bus", NULL,
clk_register_clk_pxa25x_memory());
}
#define DUMMY_CLK(_con_id, _dev_id, _parent) \
......
......@@ -270,9 +270,10 @@ RATE_RO_OPS(clk_pxa27x_run, "run");
static void __init pxa27x_register_core(void)
{
clk_register_clk_pxa27x_cpll();
clk_register_clk_pxa27x_run();
clkdev_pxa_register(CLK_NONE, "cpll", NULL,
clk_register_clk_pxa27x_cpll());
clkdev_pxa_register(CLK_NONE, "run", NULL,
clk_register_clk_pxa27x_run());
clkdev_pxa_register(CLK_CORE, "core", NULL,
clk_register_clk_pxa27x_core());
}
......@@ -382,8 +383,10 @@ static void __init pxa27x_base_clocks_init(void)
{
pxa27x_register_plls();
pxa27x_register_core();
clk_register_clk_pxa27x_system_bus();
clk_register_clk_pxa27x_memory();
clkdev_pxa_register(CLK_NONE, "system_bus", NULL,
clk_register_clk_pxa27x_system_bus());
clkdev_pxa_register(CLK_NONE, "memory", NULL,
clk_register_clk_pxa27x_memory());
clk_register_clk_pxa27x_lcd_base();
}
......
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