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Commit fba5c1af authored by Linus Torvalds's avatar Linus Torvalds
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (49 commits)
  ide-tape: remove tape->merge_stage
  ide-tape: mv tape->merge_stage_size tape->merge_bh_size
  ide-tape: mv idetape_empty_write_pipeline ide_tape_flush_merge_buffer
  ide-tape: mv idetape_discard_read_pipeline ide_tape_discard_merge_buffer
  ide-tape: make __idetape_discard_read_pipeline() of type void
  ide: remove now unused ide_pci_create_host_proc()
  ide: remove /proc/ide/ali
  ide-tape: improve buffer pages freeing strategy
  ide-tape: mv tape->pages_per_stage tape->pages_per_buffer
  ide-tape: mv tape->stage_size tape->buffer_size
  ide-tape: improve buffer allocation strategy
  ide: add struct ide_io_ports (take 3)
  ide: make ide_unregister() take 'ide_hwif_t *' as an argument (take 2)
  ide: sanitize ide_unregister() usage
  mpc8xx-ide: use ide_find_port()
  ide: add "noacpi" / "acpigtf" / "acpionboot" parameters
  gayle: add "doubler" parameter
  ide: add "cdrom=" and "chs=" parameters
  ide: add "nodma|noflush|noprobe|nowerr=" parameters
  ide: remove obsoleted "hdx=autotune" kernel parameter
  ...
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Documentation/ide/ide-tape.txt
View file @ fba5c1af
/*
* IDE ATAPI streaming tape driver.
*
* This driver is a part of the Linux ide driver.
*
* The driver, in co-operation with ide.c, basically traverses the
* request-list for the block device interface. The character device
* interface, on the other hand, creates new requests, adds them
* to the request-list of the block device, and waits for their completion.
*
* Pipelined operation mode is now supported on both reads and writes.
*
* The block device major and minor numbers are determined from the
* tape's relative position in the ide interfaces, as explained in ide.c.
*
* The character device interface consists of the following devices:
*
* ht0 major 37, minor 0 first IDE tape, rewind on close.
* ht1 major 37, minor 1 second IDE tape, rewind on close.
* ...
* nht0 major 37, minor 128 first IDE tape, no rewind on close.
* nht1 major 37, minor 129 second IDE tape, no rewind on close.
* ...
*
* The general magnetic tape commands compatible interface, as defined by
* include/linux/mtio.h, is accessible through the character device.
*
* General ide driver configuration options, such as the interrupt-unmask
* flag, can be configured by issuing an ioctl to the block device interface,
* as any other ide device.
*
* Our own ide-tape ioctl's can be issued to either the block device or
* the character device interface.
*
* Maximal throughput with minimal bus load will usually be achieved in the
* following scenario:
*
* 1. ide-tape is operating in the pipelined operation mode.
* 2. No buffering is performed by the user backup program.
*
* Testing was done with a 2 GB CONNER CTMA 4000 IDE ATAPI Streaming Tape Drive.
*
* Here are some words from the first releases of hd.c, which are quoted
* in ide.c and apply here as well:
*
* | Special care is recommended. Have Fun!
*
*
* An overview of the pipelined operation mode.
*
* In the pipelined write mode, we will usually just add requests to our
* pipeline and return immediately, before we even start to service them. The
* user program will then have enough time to prepare the next request while
* we are still busy servicing previous requests. In the pipelined read mode,
* the situation is similar - we add read-ahead requests into the pipeline,
* before the user even requested them.
*
* The pipeline can be viewed as a "safety net" which will be activated when
* the system load is high and prevents the user backup program from keeping up
* with the current tape speed. At this point, the pipeline will get
* shorter and shorter but the tape will still be streaming at the same speed.
* Assuming we have enough pipeline stages, the system load will hopefully
* decrease before the pipeline is completely empty, and the backup program
* will be able to "catch up" and refill the pipeline again.
*
* When using the pipelined mode, it would be best to disable any type of
* buffering done by the user program, as ide-tape already provides all the
* benefits in the kernel, where it can be done in a more efficient way.
* As we will usually not block the user program on a request, the most
* efficient user code will then be a simple read-write-read-... cycle.
* Any additional logic will usually just slow down the backup process.
*
* Using the pipelined mode, I get a constant over 400 KBps throughput,
* which seems to be the maximum throughput supported by my tape.
*
* However, there are some downfalls:
*
* 1. We use memory (for data buffers) in proportional to the number
* of pipeline stages (each stage is about 26 KB with my tape).
* 2. In the pipelined write mode, we cheat and postpone error codes
* to the user task. In read mode, the actual tape position
* will be a bit further than the last requested block.
*
* Concerning (1):
*
* 1. We allocate stages dynamically only when we need them. When
* we don't need them, we don't consume additional memory. In
* case we can't allocate stages, we just manage without them
* (at the expense of decreased throughput) so when Linux is
* tight in memory, we will not pose additional difficulties.
*
* 2. The maximum number of stages (which is, in fact, the maximum
* amount of memory) which we allocate is limited by the compile
* time parameter IDETAPE_MAX_PIPELINE_STAGES.
*
* 3. The maximum number of stages is a controlled parameter - We
* don't start from the user defined maximum number of stages
* but from the lower IDETAPE_MIN_PIPELINE_STAGES (again, we
* will not even allocate this amount of stages if the user
* program can't handle the speed). We then implement a feedback
* loop which checks if the pipeline is empty, and if it is, we
* increase the maximum number of stages as necessary until we
* reach the optimum value which just manages to keep the tape
* busy with minimum allocated memory or until we reach
* IDETAPE_MAX_PIPELINE_STAGES.
*
* Concerning (2):
*
* In pipelined write mode, ide-tape can not return accurate error codes
* to the user program since we usually just add the request to the
* pipeline without waiting for it to be serviced. In case an error
* occurs, I will report it on the next user request.
*
* In the pipelined read mode, subsequent read requests or forward
* filemark spacing will perform correctly, as we preserve all blocks
* and filemarks which we encountered during our excess read-ahead.
*
* For accurate tape positioning and error reporting, disabling
* pipelined mode might be the best option.
*
* You can enable/disable/tune the pipelined operation mode by adjusting
* the compile time parameters below.
*
*
* Possible improvements.
*
* 1. Support for the ATAPI overlap protocol.
*
* In order to maximize bus throughput, we currently use the DSC
* overlap method which enables ide.c to service requests from the
* other device while the tape is busy executing a command. The
* DSC overlap method involves polling the tape's status register
* for the DSC bit, and servicing the other device while the tape
* isn't ready.
*
* In the current QIC development standard (December 1995),
* it is recommended that new tape drives will *in addition*
* implement the ATAPI overlap protocol, which is used for the
* same purpose - efficient use of the IDE bus, but is interrupt
* driven and thus has much less CPU overhead.
*
* ATAPI overlap is likely to be supported in most new ATAPI
* devices, including new ATAPI cdroms, and thus provides us
* a method by which we can achieve higher throughput when
* sharing a (fast) ATA-2 disk with any (slow) new ATAPI device.
*/
IDE ATAPI streaming tape driver.
This driver is a part of the Linux ide driver.
The driver, in co-operation with ide.c, basically traverses the
request-list for the block device interface. The character device
interface, on the other hand, creates new requests, adds them
to the request-list of the block device, and waits for their completion.
The block device major and minor numbers are determined from the
tape's relative position in the ide interfaces, as explained in ide.c.
The character device interface consists of the following devices:
ht0 major 37, minor 0 first IDE tape, rewind on close.
ht1 major 37, minor 1 second IDE tape, rewind on close.
...
nht0 major 37, minor 128 first IDE tape, no rewind on close.
nht1 major 37, minor 129 second IDE tape, no rewind on close.
...
The general magnetic tape commands compatible interface, as defined by
include/linux/mtio.h, is accessible through the character device.
General ide driver configuration options, such as the interrupt-unmask
flag, can be configured by issuing an ioctl to the block device interface,
as any other ide device.
Our own ide-tape ioctl's can be issued to either the block device or
the character device interface.
Maximal throughput with minimal bus load will usually be achieved in the
following scenario:
1. ide-tape is operating in the pipelined operation mode.
2. No buffering is performed by the user backup program.
Testing was done with a 2 GB CONNER CTMA 4000 IDE ATAPI Streaming Tape Drive.
Here are some words from the first releases of hd.c, which are quoted
in ide.c and apply here as well:
| Special care is recommended. Have Fun!
Possible improvements:
1. Support for the ATAPI overlap protocol.
In order to maximize bus throughput, we currently use the DSC
overlap method which enables ide.c to service requests from the
other device while the tape is busy executing a command. The
DSC overlap method involves polling the tape's status register
for the DSC bit, and servicing the other device while the tape
isn't ready.
In the current QIC development standard (December 1995),
it is recommended that new tape drives will *in addition*
implement the ATAPI overlap protocol, which is used for the
same purpose - efficient use of the IDE bus, but is interrupt
driven and thus has much less CPU overhead.
ATAPI overlap is likely to be supported in most new ATAPI
devices, including new ATAPI cdroms, and thus provides us
a method by which we can achieve higher throughput when
sharing a (fast) ATA-2 disk with any (slow) new ATAPI device.
Documentation/ide/ide.txt
View file @ fba5c1af
......@@ -82,27 +82,26 @@ Drives are normally found by auto-probing and/or examining the CMOS/BIOS data.
For really weird situations, the apparent (fdisk) geometry can also be specified
on the kernel "command line" using LILO. The format of such lines is:
hdx=cyls,heads,sects
or hdx=cdrom
ide_core.chs=[interface_number.device_number]:cyls,heads,sects
or ide_core.cdrom=[interface_number.device_number]
where hdx can be any of hda through hdh, Three values are required
(cyls,heads,sects). For example:
For example:
hdc=1050,32,64 hdd=cdrom
ide_core.chs=1.0:1050,32,64 ide_core.cdrom=1.1
either {hda,hdb} or {hdc,hdd}. The results of successful auto-probing may
override the physical geometry/irq specified, though the "original" geometry
may be retained as the "logical" geometry for partitioning purposes (fdisk).
The results of successful auto-probing may override the physical geometry/irq
specified, though the "original" geometry may be retained as the "logical"
geometry for partitioning purposes (fdisk).
If the auto-probing during boot time confuses a drive (ie. the drive works
with hd.c but not with ide.c), then an command line option may be specified
for each drive for which you'd like the drive to skip the hardware
probe/identification sequence. For example:
hdb=noprobe
ide_core.noprobe=0.1
or
hdc=768,16,32
hdc=noprobe
ide_core.chs=1.0:768,16,32
ide_core.noprobe=1.0
Note that when only one IDE device is attached to an interface, it should be
jumpered as "single" or "master", *not* "slave". Many folks have had
......@@ -118,9 +117,9 @@ If for some reason your cdrom drive is *not* found at boot time, you can force
the probe to look harder by supplying a kernel command line parameter
via LILO, such as:
hdc=cdrom /* hdc = "master" on second interface */
ide_core.cdrom=1.0 /* "master" on second interface (hdc) */
or
hdd=cdrom /* hdd = "slave" on second interface */
ide_core.cdrom=1.1 /* "slave" on second interface (hdd) */
For example, a GW2000 system might have a hard drive on the primary
interface (/dev/hda) and an IDE cdrom drive on the secondary interface
......@@ -174,9 +173,7 @@ to /etc/modprobe.conf.
When ide.c is used as a module, you can pass command line parameters to the
driver using the "options=" keyword to insmod, while replacing any ',' with
';'. For example:
insmod ide.o options="hda=nodma hdb=nodma"
';'.
================================================================================
......@@ -184,57 +181,6 @@ driver using the "options=" keyword to insmod, while replacing any ',' with
Summary of ide driver parameters for kernel command line
--------------------------------------------------------
"hdx=" is recognized for all "x" from "a" to "u", such as "hdc".
"idex=" is recognized for all "x" from "0" to "9", such as "ide1".
"hdx=noprobe" : drive may be present, but do not probe for it
"hdx=none" : drive is NOT present, ignore cmos and do not probe
"hdx=nowerr" : ignore the WRERR_STAT bit on this drive
"hdx=cdrom" : drive is present, and is a cdrom drive
"hdx=cyl,head,sect" : disk drive is present, with specified geometry
"hdx=autotune" : driver will attempt to tune interface speed
to the fastest PIO mode supported,
if possible for this drive only.
Not fully supported by all chipset types,
and quite likely to cause trouble with
older/odd IDE drives.
"hdx=nodma" : disallow DMA
"idebus=xx" : inform IDE driver of VESA/PCI bus speed in MHz,
where "xx" is between 20 and 66 inclusive,
used when tuning chipset PIO modes.
For PCI bus, 25 is correct for a P75 system,
30 is correct for P90,P120,P180 systems,
and 33 is used for P100,P133,P166 systems.
If in doubt, use idebus=33 for PCI.
As for VLB, it is safest to not specify it.
Bigger values are safer than smaller ones.
"idex=serialize" : do not overlap operations on idex. Please note
that you will have to specify this option for
both the respective primary and secondary channel
to take effect.
"idex=reset" : reset interface after probe
"idex=ata66" : informs the interface that it has an 80c cable
for chipsets that are ATA-66 capable, but the
ability to bit test for detection is currently
unknown.
"ide=doubler" : probe/support IDE doublers on Amiga
There may be more options than shown -- use the source, Luke!
Everything else is rejected with a "BAD OPTION" message.
For legacy IDE VLB host drivers (ali14xx/dtc2278/ht6560b/qd65xx/umc8672)
you need to explicitly enable probing by using "probe" kernel parameter,
i.e. to enable probing for ALI M14xx chipsets (ali14xx host driver) use:
......@@ -251,6 +197,33 @@ are detected automatically).
You also need to use "probe" kernel parameter for ide-4drives driver
(support for IDE generic chipset with four drives on one port).
To enable support for IDE doublers on Amiga use "doubler" kernel parameter
for gayle host driver (i.e. "gayle.doubler" if the driver is built-in).
To force ignoring cable detection (this should be needed only if you're using
short 40-wires cable which cannot be automatically detected - if this is not
a case please report it as a bug instead) use "ignore_cable" kernel parameter:
* "ide_core.ignore_cable=[interface_number]" boot option if IDE is built-in
(i.e. "ide_core.ignore_cable=1" to force ignoring cable for "ide1")
* "ignore_cable=[interface_number]" module parameter (for ide_core module)
if IDE is compiled as module
Other kernel parameters for ide_core are:
* "nodma=[interface_number.device_number]" to disallow DMA for a device
* "noflush=[interface_number.device_number]" to disable flush requests
* "noprobe=[interface_number.device_number]" to skip probing
* "nowerr=[interface_number.device_number]" to ignore the WRERR_STAT bit
* "cdrom=[interface_number.device_number]" to force device as a CD-ROM
* "chs=[interface_number.device_number]" to force device as a disk (using CHS)
================================================================================
Some Terminology
......
Documentation/kernel-parameters.txt
View file @ fba5c1af
......@@ -772,10 +772,6 @@ and is between 256 and 4096 characters. It is defined in the file
Format: ide=nodma or ide=doubler
See Documentation/ide/ide.txt.
ide?= [HW] (E)IDE subsystem
Format: ide?=ata66 or chipset specific parameters.
See Documentation/ide/ide.txt.
idebus= [HW] (E)IDE subsystem - VLB/PCI bus speed
See Documentation/ide/ide.txt.
......
drivers/ide/arm/bast-ide.c
View file @ fba5c1af
......@@ -35,12 +35,12 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
base += BAST_IDE_CS;
aux += BAST_IDE_CS;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw.io_ports[i] = (unsigned long)base;
for (i = 0; i <= 7; i++) {
hw.io_ports_array[i] = (unsigned long)base;
base += 0x20;
}
hw.io_ports[IDE_CONTROL_OFFSET] = aux + (6 * 0x20);
hw.io_ports.ctl_addr = aux + (6 * 0x20);
hw.irq = irq;
hwif = ide_find_port();
......@@ -49,11 +49,7 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
i = hwif->index;
if (hwif->present)
ide_unregister(i);
else
ide_init_port_data(hwif, i);
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->port_ops = NULL;
......
drivers/ide/arm/icside.c
View file @ fba5c1af
......@@ -426,11 +426,12 @@ icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *e
*/
default_hwif_mmiops(hwif);
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hwif->io_ports[i] = port;
for (i = 0; i <= 7; i++) {
hwif->io_ports_array[i] = port;
port += 1 << info->stepping;
}
hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)base + info->ctrloffset;
hwif->io_ports.ctl_addr =
(unsigned long)base + info->ctrloffset;
hwif->irq = ec->irq;
hwif->chipset = ide_acorn;
hwif->gendev.parent = &ec->dev;
......@@ -480,8 +481,7 @@ static const struct ide_port_info icside_v6_port_info __initdata = {
.init_dma = icside_dma_off_init,
.port_ops = &icside_v6_no_dma_port_ops,
.dma_ops = &icside_v6_dma_ops,
.host_flags = IDE_HFLAG_SERIALIZE |
IDE_HFLAG_NO_AUTOTUNE,
.host_flags = IDE_HFLAG_SERIALIZE,
.mwdma_mask = ATA_MWDMA2,
.swdma_mask = ATA_SWDMA2,
};
......@@ -547,14 +547,13 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
hwif->config_data = (unsigned long)ioc_base;
hwif->select_data = sel;
mate->maskproc = icside_maskproc;
mate->hwif_data = state;
mate->config_data = (unsigned long)ioc_base;
mate->select_data = sel | 1;
if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) {
d.init_dma = icside_dma_init;
d.port_ops = &icside_v6_dma_port_ops;
d.port_ops = &icside_v6_port_ops;
d.dma_ops = NULL;
}
......
drivers/ide/arm/palm_bk3710.c
View file @ fba5c1af
......@@ -321,7 +321,7 @@ static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif,
const struct ide_port_info *d)
{
unsigned long base =
hwif->io_ports[IDE_DATA_OFFSET] - IDE_PALM_ATA_PRI_REG_OFFSET;
hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;
printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
......@@ -386,8 +386,8 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET;
for (i = 0; i < IDE_NR_PORTS - 2; i++)
hw.io_ports[i] = pribase + i;
hw.io_ports[IDE_CONTROL_OFFSET] = mem->start +
hw.io_ports_array[i] = pribase + i;
hw.io_ports.ctl_addr = mem->start +
IDE_PALM_ATA_PRI_CTL_OFFSET;
hw.irq = irq->start;
hw.chipset = ide_palm3710;
......@@ -398,11 +398,7 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
i = hwif->index;
if (hwif->present)
ide_unregister(i);
else
ide_init_port_data(hwif, i);
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->mmio = 1;
......
drivers/ide/arm/rapide.c
View file @ fba5c1af
......@@ -17,11 +17,11 @@ static void rapide_setup_ports(hw_regs_t *hw, void __iomem *base,
unsigned long port = (unsigned long)base;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = port;
for (i = 0; i <= 7; i++) {
hw->io_ports_array[i] = port;
port += sz;
}
hw->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;
hw->io_ports.ctl_addr = (unsigned long)ctrl;
hw->irq = irq;
}
......@@ -75,7 +75,7 @@ static void __devexit rapide_remove(struct expansion_card *ec)
ecard_set_drvdata(ec, NULL);
ide_unregister(hwif->index);
ide_unregister(hwif);
ecard_release_resources(ec);
}
......
drivers/ide/cris/ide-cris.c
View file @ fba5c1af
......@@ -88,8 +88,8 @@ enum /* Transfer types */
int
cris_ide_ack_intr(ide_hwif_t* hwif)
{
reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,
int, hwif->io_ports[0]);
reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,
hwif->io_ports.data_addr);
REG_WR_INT(ata, regi_ata, rw_ack_intr, 1 << ctrl2.sel);
return 1;
}
......@@ -231,7 +231,7 @@ cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int dir,int type,
ide_hwif_t *hwif = drive->hwif;
reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,
hwif->io_ports[IDE_DATA_OFFSET]);
hwif->io_ports.data_addr);
reg_ata_rw_trf_cnt trf_cnt = {0};
mycontext.saved_data = (dma_descr_data*)virt_to_phys(d);
......@@ -271,7 +271,7 @@ static int cris_dma_test_irq(ide_drive_t *drive)
int intr = REG_RD_INT(ata, regi_ata, r_intr);
reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,
hwif->io_ports[IDE_DATA_OFFSET]);
hwif->io_ports.data_addr);
return intr & (1 << ctrl2.sel) ? 1 : 0;
}
......@@ -531,7 +531,7 @@ static void cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int d
*R_ATA_CTRL_DATA =
cmd |
IO_FIELD(R_ATA_CTRL_DATA, data,
drive->hwif->io_ports[IDE_DATA_OFFSET]) |
drive->hwif->io_ports.data_addr) |
IO_STATE(R_ATA_CTRL_DATA, src_dst, dma) |
IO_STATE(R_ATA_CTRL_DATA, multi, on) |
IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
......@@ -550,7 +550,7 @@ static int cris_dma_test_irq(ide_drive_t *drive)
{
int intr = *R_IRQ_MASK0_RD;
int bus = IO_EXTRACT(R_ATA_CTRL_DATA, sel,
drive->hwif->io_ports[IDE_DATA_OFFSET]);
drive->hwif->io_ports.data_addr);
return intr & (1 << (bus + IO_BITNR(R_IRQ_MASK0_RD, ata_irq0))) ? 1 : 0;
}
......@@ -644,7 +644,7 @@ cris_ide_inw(unsigned long reg) {
* call will also timeout on busy, but as long as the
* write is still performed, everything will be fine.
*/
if (cris_ide_get_reg(reg) == IDE_STATUS_OFFSET)
if (cris_ide_get_reg(reg) == 7)
return BUSY_STAT;
else
/* For other rare cases we assume 0 is good enough. */
......@@ -765,13 +765,13 @@ static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base)
memset(hw, 0, sizeof(*hw));
for (i = 0; i <= 7; i++)
hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1);
hw->io_ports_array[i] = base + cris_ide_reg_addr(i, 0, 1);
/*
* the IDE control register is at ATA address 6,
* with CS1 active instead of CS0
*/
hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0);
hw->io_ports.ctl_addr = base + cris_ide_reg_addr(6, 1, 0);
hw->irq = ide_default_irq(0);
hw->ack_intr = cris_ide_ack_intr;
......
drivers/ide/h8300/ide-h8300.c
View file @ fba5c1af
......@@ -63,9 +63,9 @@ static inline void hw_setup(hw_regs_t *hw)
int i;
memset(hw, 0, sizeof(hw_regs_t));
for (i = 0; i <= IDE_STATUS_OFFSET; i++)
hw->io_ports[i] = CONFIG_H8300_IDE_BASE + H8300_IDE_GAP*i;
hw->io_ports[IDE_CONTROL_OFFSET] = CONFIG_H8300_IDE_ALT;
for (i = 0; i <= 7; i++)
hw->io_ports_array[i] = CONFIG_H8300_IDE_BASE + H8300_IDE_GAP*i;
hw->io_ports.ctl_addr = CONFIG_H8300_IDE_ALT;
hw->irq = EXT_IRQ0 + CONFIG_H8300_IDE_IRQ;
hw->chipset = ide_generic;
}
......
drivers/ide/ide-acpi.c
View file @ fba5c1af
......@@ -60,9 +60,17 @@ struct ide_acpi_hwif_link {
#define DEBPRINT(fmt, args...) do {} while (0)
#endif /* DEBUGGING */
extern int ide_noacpi;
extern int ide_noacpitfs;
extern int ide_noacpionboot;
int ide_noacpi;
module_param_named(noacpi, ide_noacpi, bool, 0);
MODULE_PARM_DESC(noacpi, "disable IDE ACPI support");
int ide_acpigtf;
module_param_named(acpigtf, ide_acpigtf, bool, 0);
MODULE_PARM_DESC(acpigtf, "enable IDE ACPI _GTF support");
int ide_acpionboot;
module_param_named(acpionboot, ide_acpionboot, bool, 0);
MODULE_PARM_DESC(acpionboot, "call IDE ACPI methods on boot");
static bool ide_noacpi_psx;
static int no_acpi_psx(const struct dmi_system_id *id)
......@@ -376,7 +384,7 @@ static int taskfile_load_raw(ide_drive_t *drive,
memcpy(&args.tf_array[7], &gtf->tfa, 7);
args.tf_flags = IDE_TFLAG_TF | IDE_TFLAG_DEVICE;
if (ide_noacpitfs) {
if (!ide_acpigtf) {
DEBPRINT("_GTF execution disabled\n");
return err;
}
......@@ -721,7 +729,7 @@ void ide_acpi_port_init_devices(ide_hwif_t *hwif)
drive->name, err);
}
if (ide_noacpionboot) {
if (!ide_acpionboot) {
DEBPRINT("ACPI methods disabled on boot\n");
return;
}
......
drivers/ide/ide-cd.c
View file @ fba5c1af
......@@ -560,7 +560,7 @@ static ide_startstop_t cdrom_start_packet_command(ide_drive_t *drive,
/* packet command */
spin_lock_irqsave(&ide_lock, flags);
hwif->OUTBSYNC(drive, WIN_PACKETCMD,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->io_ports.command_addr);
ndelay(400);
spin_unlock_irqrestore(&ide_lock, flags);
......@@ -952,9 +952,9 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
}
/* ok we fall to pio :/ */
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]) & 0x3;
lowcyl = hwif->INB(hwif->io_ports[IDE_BCOUNTL_OFFSET]);
highcyl = hwif->INB(hwif->io_ports[IDE_BCOUNTH_OFFSET]);
ireason = hwif->INB(hwif->io_ports.nsect_addr) & 0x3;
lowcyl = hwif->INB(hwif->io_ports.lbam_addr);
highcyl = hwif->INB(hwif->io_ports.lbah_addr);
len = lowcyl + (256 * highcyl);
......@@ -1909,9 +1909,7 @@ static int ide_cdrom_setup(ide_drive_t *drive)
/* set correct block size */
blk_queue_hardsect_size(drive->queue, CD_FRAMESIZE);
if (drive->autotune == IDE_TUNE_DEFAULT ||
drive->autotune == IDE_TUNE_AUTO)
drive->dsc_overlap = (drive->next != drive);
drive->dsc_overlap = (drive->next != drive);
if (ide_cdrom_register(drive, nslots)) {
printk(KERN_ERR "%s: %s failed to register device with the"
......
drivers/ide/ide-floppy.c
View file @ fba5c1af
......@@ -465,10 +465,10 @@ static ide_startstop_t idefloppy_pc_intr(ide_drive_t *drive)
}
/* Get the number of bytes to transfer */
bcount = (hwif->INB(hwif->io_ports[IDE_BCOUNTH_OFFSET]) << 8) |
hwif->INB(hwif->io_ports[IDE_BCOUNTL_OFFSET]);
bcount = (hwif->INB(hwif->io_ports.lbah_addr) << 8) |
hwif->INB(hwif->io_ports.lbam_addr);
/* on this interrupt */
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]);
ireason = hwif->INB(hwif->io_ports.nsect_addr);
if (ireason & CD) {
printk(KERN_ERR "ide-floppy: CoD != 0 in %s\n", __func__);
......@@ -539,7 +539,7 @@ static ide_startstop_t idefloppy_transfer_pc(ide_drive_t *drive)
"initiated yet DRQ isn't asserted\n");
return startstop;
}
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]);
ireason = hwif->INB(hwif->io_ports.nsect_addr);
if ((ireason & CD) == 0 || (ireason & IO)) {
printk(KERN_ERR "ide-floppy: (IO,CoD) != (0,1) while "
"issuing a packet command\n");
......@@ -586,7 +586,7 @@ static ide_startstop_t idefloppy_transfer_pc1(ide_drive_t *drive)
"initiated yet DRQ isn't asserted\n");
return startstop;
}
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]);
ireason = hwif->INB(hwif->io_ports.nsect_addr);
if ((ireason & CD) == 0 || (ireason & IO)) {
printk(KERN_ERR "ide-floppy: (IO,CoD) != (0,1) "
"while issuing a packet command\n");
......@@ -692,7 +692,7 @@ static ide_startstop_t idefloppy_issue_pc(ide_drive_t *drive,
return ide_started;
} else {
/* Issue the packet command */
hwif->OUTB(WIN_PACKETCMD, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_PACKETCMD, hwif->io_ports.command_addr);
return (*pkt_xfer_routine) (drive);
}
}
......
drivers/ide/ide-io.c
View file @ fba5c1af
......@@ -298,48 +298,43 @@ static void ide_complete_pm_request (ide_drive_t *drive, struct request *rq)
void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
if (task->tf_flags & IDE_TFLAG_IN_DATA) {
u16 data = hwif->INW(hwif->io_ports[IDE_DATA_OFFSET]);
u16 data = hwif->INW(io_ports->data_addr);
tf->data = data & 0xff;
tf->hob_data = (data >> 8) & 0xff;
}
/* be sure we're looking at the low order bits */
hwif->OUTB(drive->ctl & ~0x80, hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->OUTB(drive->ctl & ~0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_NSECT)
tf->nsect = hwif->INB(hwif->io_ports[IDE_NSECTOR_OFFSET]);
tf->nsect = hwif->INB(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAL)
tf->lbal = hwif->INB(hwif->io_ports[IDE_SECTOR_OFFSET]);
tf->lbal = hwif->INB(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAM)
tf->lbam = hwif->INB(hwif->io_ports[IDE_LCYL_OFFSET]);
tf->lbam = hwif->INB(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_LBAH)
tf->lbah = hwif->INB(hwif->io_ports[IDE_HCYL_OFFSET]);
tf->lbah = hwif->INB(io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
tf->device = hwif->INB(hwif->io_ports[IDE_SELECT_OFFSET]);
tf->device = hwif->INB(io_ports->device_addr);
if (task->tf_flags & IDE_TFLAG_LBA48) {
hwif->OUTB(drive->ctl | 0x80,
hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->OUTB(drive->ctl | 0x80, io_ports->ctl_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
tf->hob_feature =
hwif->INB(hwif->io_ports[IDE_FEATURE_OFFSET]);
tf->hob_feature = hwif->INB(io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
tf->hob_nsect =
hwif->INB(hwif->io_ports[IDE_NSECTOR_OFFSET]);
tf->hob_nsect = hwif->INB(io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
tf->hob_lbal =
hwif->INB(hwif->io_ports[IDE_SECTOR_OFFSET]);
tf->hob_lbal = hwif->INB(io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
tf->hob_lbam =
hwif->INB(hwif->io_ports[IDE_LCYL_OFFSET]);
tf->hob_lbam = hwif->INB(io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
tf->hob_lbah =
hwif->INB(hwif->io_ports[IDE_HCYL_OFFSET]);
tf->hob_lbah = hwif->INB(io_ports->lbah_addr);
}
}
......@@ -454,7 +449,7 @@ static ide_startstop_t ide_ata_error(ide_drive_t *drive, struct request *rq, u8
if (err == ABRT_ERR) {
if (drive->select.b.lba &&
/* some newer drives don't support WIN_SPECIFY */
hwif->INB(hwif->io_ports[IDE_COMMAND_OFFSET]) ==
hwif->INB(hwif->io_ports.command_addr) ==
WIN_SPECIFY)
return ide_stopped;
} else if ((err & BAD_CRC) == BAD_CRC) {
......@@ -507,8 +502,7 @@ static ide_startstop_t ide_atapi_error(ide_drive_t *drive, struct request *rq, u
if (ide_read_status(drive) & (BUSY_STAT | DRQ_STAT))
/* force an abort */
hwif->OUTB(WIN_IDLEIMMEDIATE,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_IDLEIMMEDIATE, hwif->io_ports.command_addr);
if (rq->errors >= ERROR_MAX) {
ide_kill_rq(drive, rq);
......@@ -1421,7 +1415,7 @@ static void unexpected_intr (int irq, ide_hwgroup_t *hwgroup)
*/
do {
if (hwif->irq == irq) {
stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = hwif->INB(hwif->io_ports.status_addr);
if (!OK_STAT(stat, READY_STAT, BAD_STAT)) {
/* Try to not flood the console with msgs */
static unsigned long last_msgtime, count;
......@@ -1511,7 +1505,7 @@ irqreturn_t ide_intr (int irq, void *dev_id)
* Whack the status register, just in case
* we have a leftover pending IRQ.
*/
(void) hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
(void) hwif->INB(hwif->io_ports.status_addr);
#endif /* CONFIG_BLK_DEV_IDEPCI */
}
spin_unlock_irqrestore(&ide_lock, flags);
......
drivers/ide/ide-iops.c
View file @ fba5c1af
......@@ -164,7 +164,7 @@ void SELECT_DRIVE (ide_drive_t *drive)
if (port_ops && port_ops->selectproc)
port_ops->selectproc(drive);
hwif->OUTB(drive->select.all, hwif->io_ports[IDE_SELECT_OFFSET]);
hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
}
void SELECT_MASK (ide_drive_t *drive, int mask)
......@@ -194,24 +194,22 @@ static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
*/
static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
{
ide_hwif_t *hwif = HWIF(drive);
u8 io_32bit = drive->io_32bit;
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
u8 io_32bit = drive->io_32bit;
if (io_32bit) {
if (io_32bit & 2) {
unsigned long flags;
local_irq_save(flags);
ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount);
ata_vlb_sync(drive, io_ports->nsect_addr);
hwif->INSL(io_ports->data_addr, buffer, wcount);
local_irq_restore(flags);
} else
hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount);
hwif->INSL(io_ports->data_addr, buffer, wcount);
} else
hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount << 1);
hwif->INSW(io_ports->data_addr, buffer, wcount << 1);
}
/*
......@@ -219,24 +217,22 @@ static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
*/
static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
{
ide_hwif_t *hwif = HWIF(drive);
u8 io_32bit = drive->io_32bit;
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
u8 io_32bit = drive->io_32bit;
if (io_32bit) {
if (io_32bit & 2) {
unsigned long flags;
local_irq_save(flags);
ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount);
ata_vlb_sync(drive, io_ports->nsect_addr);
hwif->OUTSL(io_ports->data_addr, buffer, wcount);
local_irq_restore(flags);
} else
hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount);
hwif->OUTSL(io_ports->data_addr, buffer, wcount);
} else
hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
wcount << 1);
hwif->OUTSW(io_ports->data_addr, buffer, wcount << 1);
}
/*
......@@ -255,14 +251,13 @@ static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
if (MACH_IS_ATARI || MACH_IS_Q40) {
/* Atari has a byte-swapped IDE interface */
insw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
bytecount / 2);
insw_swapw(hwif->io_ports.data_addr, buffer, bytecount / 2);
return;
}
#endif /* CONFIG_ATARI || CONFIG_Q40 */
hwif->ata_input_data(drive, buffer, bytecount / 4);
if ((bytecount & 0x03) >= 2)
hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET],
hwif->INSW(hwif->io_ports.data_addr,
(u8 *)buffer + (bytecount & ~0x03), 1);
}
......@@ -274,14 +269,13 @@ static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
if (MACH_IS_ATARI || MACH_IS_Q40) {
/* Atari has a byte-swapped IDE interface */
outsw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
bytecount / 2);
outsw_swapw(hwif->io_ports.data_addr, buffer, bytecount / 2);
return;
}
#endif /* CONFIG_ATARI || CONFIG_Q40 */
hwif->ata_output_data(drive, buffer, bytecount / 4);
if ((bytecount & 0x03) >= 2)
hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET],
hwif->OUTSW(hwif->io_ports.data_addr,
(u8 *)buffer + (bytecount & ~0x03), 1);
}
......@@ -445,7 +439,7 @@ int drive_is_ready (ide_drive_t *drive)
* an interrupt with another pci card/device. We make no assumptions
* about possible isa-pnp and pci-pnp issues yet.
*/
if (hwif->io_ports[IDE_CONTROL_OFFSET])
if (hwif->io_ports.ctl_addr)
stat = ide_read_altstatus(drive);
else
/* Note: this may clear a pending IRQ!! */
......@@ -647,7 +641,7 @@ int ide_driveid_update(ide_drive_t *drive)
SELECT_MASK(drive, 1);
ide_set_irq(drive, 1);
msleep(50);
hwif->OUTB(WIN_IDENTIFY, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_IDENTIFY, hwif->io_ports.command_addr);
timeout = jiffies + WAIT_WORSTCASE;
do {
if (time_after(jiffies, timeout)) {
......@@ -696,6 +690,7 @@ int ide_driveid_update(ide_drive_t *drive)
int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
int error = 0;
u8 stat;
......@@ -734,10 +729,9 @@ int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
SELECT_MASK(drive, 0);
udelay(1);
ide_set_irq(drive, 0);
hwif->OUTB(speed, hwif->io_ports[IDE_NSECTOR_OFFSET]);
hwif->OUTB(SETFEATURES_XFER, hwif->io_ports[IDE_FEATURE_OFFSET]);
hwif->OUTBSYNC(drive, WIN_SETFEATURES,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(speed, io_ports->nsect_addr);
hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr);
if (drive->quirk_list == 2)
ide_set_irq(drive, 1);
......@@ -845,7 +839,7 @@ void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
spin_lock_irqsave(&ide_lock, flags);
__ide_set_handler(drive, handler, timeout, expiry);
hwif->OUTBSYNC(drive, cmd, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr);
/*
* Drive takes 400nS to respond, we must avoid the IRQ being
* serviced before that.
......@@ -1029,6 +1023,7 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
unsigned long flags;
ide_hwif_t *hwif;
ide_hwgroup_t *hwgroup;
struct ide_io_ports *io_ports;
const struct ide_port_ops *port_ops;
u8 ctl;
......@@ -1036,6 +1031,8 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
hwif = HWIF(drive);
hwgroup = HWGROUP(drive);
io_ports = &hwif->io_ports;
/* We must not reset with running handlers */
BUG_ON(hwgroup->handler != NULL);
......@@ -1045,8 +1042,7 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
pre_reset(drive);
SELECT_DRIVE(drive);
udelay (20);
hwif->OUTBSYNC(drive, WIN_SRST,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr);
ndelay(400);
hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
hwgroup->polling = 1;
......@@ -1062,7 +1058,7 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
for (unit = 0; unit < MAX_DRIVES; ++unit)
pre_reset(&hwif->drives[unit]);
if (hwif->io_ports[IDE_CONTROL_OFFSET] == 0) {
if (io_ports->ctl_addr == 0) {
spin_unlock_irqrestore(&ide_lock, flags);
return ide_stopped;
}
......@@ -1077,14 +1073,14 @@ static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
* recover from reset very quickly, saving us the first 50ms wait time.
*/
/* set SRST and nIEN */
hwif->OUTBSYNC(drive, drive->ctl|6, hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr);
/* more than enough time */
udelay(10);
if (drive->quirk_list == 2)
ctl = drive->ctl; /* clear SRST and nIEN */
else
ctl = drive->ctl | 2; /* clear SRST, leave nIEN */
hwif->OUTBSYNC(drive, ctl, hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr);
/* more than enough time */
udelay(10);
hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
......@@ -1129,7 +1125,7 @@ int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
* about locking issues (2.5 work ?).
*/
mdelay(1);
stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = hwif->INB(hwif->io_ports.status_addr);
if ((stat & BUSY_STAT) == 0)
return 0;
/*
......
drivers/ide/ide-pnp.c
View file @ fba5c1af
......@@ -82,10 +82,7 @@ static void idepnp_remove(struct pnp_dev *dev)
{
ide_hwif_t *hwif = pnp_get_drvdata(dev);
if (hwif)
ide_unregister(hwif->index);
else
printk(KERN_ERR "idepnp: Unable to remove device, please report.\n");
ide_unregister(hwif);
release_region(pnp_port_start(dev, 1), 1);
release_region(pnp_port_start(dev, 0), 8);
......
drivers/ide/ide-probe.c
View file @ fba5c1af
......@@ -264,6 +264,7 @@ static inline void do_identify (ide_drive_t *drive, u8 cmd)
static int actual_try_to_identify (ide_drive_t *drive, u8 cmd)
{
ide_hwif_t *hwif = HWIF(drive);
struct ide_io_ports *io_ports = &hwif->io_ports;
int use_altstatus = 0, rc;
unsigned long timeout;
u8 s = 0, a = 0;
......@@ -271,7 +272,7 @@ static int actual_try_to_identify (ide_drive_t *drive, u8 cmd)
/* take a deep breath */
msleep(50);
if (hwif->io_ports[IDE_CONTROL_OFFSET]) {
if (io_ports->ctl_addr) {
a = ide_read_altstatus(drive);
s = ide_read_status(drive);
if ((a ^ s) & ~INDEX_STAT)
......@@ -289,10 +290,10 @@ static int actual_try_to_identify (ide_drive_t *drive, u8 cmd)
*/
if ((cmd == WIN_PIDENTIFY))
/* disable dma & overlap */
hwif->OUTB(0, hwif->io_ports[IDE_FEATURE_OFFSET]);
hwif->OUTB(0, io_ports->feature_addr);
/* ask drive for ID */
hwif->OUTB(cmd, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(cmd, io_ports->command_addr);
timeout = ((cmd == WIN_IDENTIFY) ? WAIT_WORSTCASE : WAIT_PIDENTIFY) / 2;
timeout += jiffies;
......@@ -353,7 +354,7 @@ static int try_to_identify (ide_drive_t *drive, u8 cmd)
* interrupts during the identify-phase that
* the irq handler isn't expecting.
*/
if (hwif->io_ports[IDE_CONTROL_OFFSET]) {
if (hwif->io_ports.ctl_addr) {
if (!hwif->irq) {
autoprobe = 1;
cookie = probe_irq_on();
......@@ -393,7 +394,7 @@ static int ide_busy_sleep(ide_hwif_t *hwif)
do {
msleep(50);
stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = hwif->INB(hwif->io_ports.status_addr);
if ((stat & BUSY_STAT) == 0)
return 0;
} while (time_before(jiffies, timeout));
......@@ -425,6 +426,7 @@ static int ide_busy_sleep(ide_hwif_t *hwif)
static int do_probe (ide_drive_t *drive, u8 cmd)
{
ide_hwif_t *hwif = HWIF(drive);
struct ide_io_ports *io_ports = &hwif->io_ports;
int rc;
u8 stat;
......@@ -445,7 +447,7 @@ static int do_probe (ide_drive_t *drive, u8 cmd)
msleep(50);
SELECT_DRIVE(drive);
msleep(50);
if (hwif->INB(hwif->io_ports[IDE_SELECT_OFFSET]) != drive->select.all &&
if (hwif->INB(io_ports->device_addr) != drive->select.all &&
!drive->present) {
if (drive->select.b.unit != 0) {
/* exit with drive0 selected */
......@@ -472,17 +474,13 @@ static int do_probe (ide_drive_t *drive, u8 cmd)
if (stat == (BUSY_STAT | READY_STAT))
return 4;
if ((rc == 1 && cmd == WIN_PIDENTIFY) &&
((drive->autotune == IDE_TUNE_DEFAULT) ||
(drive->autotune == IDE_TUNE_AUTO))) {
if (rc == 1 && cmd == WIN_PIDENTIFY) {
printk(KERN_ERR "%s: no response (status = 0x%02x), "
"resetting drive\n", drive->name, stat);
msleep(50);
hwif->OUTB(drive->select.all,
hwif->io_ports[IDE_SELECT_OFFSET]);
hwif->OUTB(drive->select.all, io_ports->device_addr);
msleep(50);
hwif->OUTB(WIN_SRST,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_SRST, io_ports->command_addr);
(void)ide_busy_sleep(hwif);
rc = try_to_identify(drive, cmd);
}
......@@ -518,7 +516,7 @@ static void enable_nest (ide_drive_t *drive)
printk("%s: enabling %s -- ", hwif->name, drive->id->model);
SELECT_DRIVE(drive);
msleep(50);
hwif->OUTB(EXABYTE_ENABLE_NEST, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(EXABYTE_ENABLE_NEST, hwif->io_ports.command_addr);
if (ide_busy_sleep(hwif)) {
printk(KERN_CONT "failed (timeout)\n");
......@@ -800,14 +798,9 @@ static int ide_probe_port(ide_hwif_t *hwif)
if (drive->present)
rc = 0;
}
if (hwif->io_ports[IDE_CONTROL_OFFSET] && hwif->reset) {
printk(KERN_WARNING "%s: reset\n", hwif->name);
hwif->OUTB(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
udelay(10);
hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
(void)ide_busy_sleep(hwif);
}
local_irq_restore(flags);
/*
* Use cached IRQ number. It might be (and is...) changed by probe
* code above
......@@ -834,12 +827,7 @@ static void ide_port_tune_devices(ide_hwif_t *hwif)
ide_drive_t *drive = &hwif->drives[unit];
if (drive->present) {
if (drive->autotune == IDE_TUNE_AUTO)
ide_set_max_pio(drive);
if (drive->autotune != IDE_TUNE_DEFAULT &&
drive->autotune != IDE_TUNE_AUTO)
continue;
ide_set_max_pio(drive);
drive->nice1 = 1;
......@@ -994,6 +982,7 @@ static void ide_port_setup_devices(ide_hwif_t *hwif)
*/
static int init_irq (ide_hwif_t *hwif)
{
struct ide_io_ports *io_ports = &hwif->io_ports;
unsigned int index;
ide_hwgroup_t *hwgroup;
ide_hwif_t *match = NULL;
......@@ -1077,9 +1066,9 @@ static int init_irq (ide_hwif_t *hwif)
if (IDE_CHIPSET_IS_PCI(hwif->chipset))
sa = IRQF_SHARED;
if (hwif->io_ports[IDE_CONTROL_OFFSET])
if (io_ports->ctl_addr)
/* clear nIEN */
hwif->OUTB(0x08, hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->OUTB(0x08, io_ports->ctl_addr);
if (request_irq(hwif->irq,&ide_intr,sa,hwif->name,hwgroup))
goto out_unlink;
......@@ -1095,12 +1084,11 @@ static int init_irq (ide_hwif_t *hwif)
#if !defined(__mc68000__)
printk("%s at 0x%03lx-0x%03lx,0x%03lx on irq %d", hwif->name,
hwif->io_ports[IDE_DATA_OFFSET],
hwif->io_ports[IDE_DATA_OFFSET]+7,
hwif->io_ports[IDE_CONTROL_OFFSET], hwif->irq);
io_ports->data_addr, io_ports->status_addr,
io_ports->ctl_addr, hwif->irq);
#else
printk("%s at 0x%08lx on irq %d", hwif->name,
hwif->io_ports[IDE_DATA_OFFSET], hwif->irq);
io_ports->data_addr, hwif->irq);
#endif /* __mc68000__ */
if (match)
printk(" (%sed with %s)",
......@@ -1242,8 +1230,8 @@ static int hwif_init(ide_hwif_t *hwif)
int old_irq;
if (!hwif->irq) {
if (!(hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET])))
{
hwif->irq = ide_default_irq(hwif->io_ports.data_addr);
if (!hwif->irq) {
printk("%s: DISABLED, NO IRQ\n", hwif->name);
return 0;
}
......@@ -1272,7 +1260,8 @@ static int hwif_init(ide_hwif_t *hwif)
* It failed to initialise. Find the default IRQ for
* this port and try that.
*/
if (!(hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]))) {
hwif->irq = ide_default_irq(hwif->io_ports.data_addr);
if (!hwif->irq) {
printk("%s: Disabled unable to get IRQ %d.\n",
hwif->name, old_irq);
goto out;
......@@ -1336,8 +1325,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif)
drive->unmask = 1;
if (hwif->host_flags & IDE_HFLAG_NO_UNMASK_IRQS)
drive->no_unmask = 1;
if ((hwif->host_flags & IDE_HFLAG_NO_AUTOTUNE) == 0)
drive->autotune = 1;
}
if (port_ops && port_ops->port_init_devs)
......@@ -1518,13 +1505,20 @@ int ide_device_add_all(u8 *idx, const struct ide_port_info *d)
int i, rc = 0;
for (i = 0; i < MAX_HWIFS; i++) {
if (d == NULL || idx[i] == 0xff) {
if (idx[i] == 0xff) {
mate = NULL;
continue;
}
hwif = &ide_hwifs[idx[i]];
ide_port_apply_params(hwif);
if (d == NULL) {
mate = NULL;
continue;
}
if (d->chipset != ide_etrax100 && (i & 1) && mate) {
hwif->mate = mate;
mate->mate = hwif;
......@@ -1621,6 +1615,7 @@ EXPORT_SYMBOL_GPL(ide_device_add);
void ide_port_scan(ide_hwif_t *hwif)
{
ide_port_apply_params(hwif);
ide_port_cable_detect(hwif);
ide_port_init_devices(hwif);
......
drivers/ide/ide-proc.c
View file @ fba5c1af
......@@ -786,14 +786,6 @@ void ide_proc_register_port(ide_hwif_t *hwif)
}
}
#ifdef CONFIG_BLK_DEV_IDEPCI
void ide_pci_create_host_proc(const char *name, get_info_t *get_info)
{
create_proc_info_entry(name, 0, proc_ide_root, get_info);
}
EXPORT_SYMBOL_GPL(ide_pci_create_host_proc);
#endif
void ide_proc_unregister_port(ide_hwif_t *hwif)
{
if (hwif->proc) {
......
drivers/ide/ide-tape.c
View file @ fba5c1af
This diff is collapsed.
drivers/ide/ide-taskfile.c
View file @ fba5c1af
......@@ -36,6 +36,7 @@
void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
struct ide_taskfile *tf = &task->tf;
u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
......@@ -59,34 +60,33 @@ void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
SELECT_MASK(drive, 0);
if (task->tf_flags & IDE_TFLAG_OUT_DATA)
hwif->OUTW((tf->hob_data << 8) | tf->data,
hwif->io_ports[IDE_DATA_OFFSET]);
hwif->OUTW((tf->hob_data << 8) | tf->data, io_ports->data_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
hwif->OUTB(tf->hob_feature, hwif->io_ports[IDE_FEATURE_OFFSET]);
hwif->OUTB(tf->hob_feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
hwif->OUTB(tf->hob_nsect, hwif->io_ports[IDE_NSECTOR_OFFSET]);
hwif->OUTB(tf->hob_nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
hwif->OUTB(tf->hob_lbal, hwif->io_ports[IDE_SECTOR_OFFSET]);
hwif->OUTB(tf->hob_lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
hwif->OUTB(tf->hob_lbam, hwif->io_ports[IDE_LCYL_OFFSET]);
hwif->OUTB(tf->hob_lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
hwif->OUTB(tf->hob_lbah, hwif->io_ports[IDE_HCYL_OFFSET]);
hwif->OUTB(tf->hob_lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
hwif->OUTB(tf->feature, hwif->io_ports[IDE_FEATURE_OFFSET]);
hwif->OUTB(tf->feature, io_ports->feature_addr);
if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
hwif->OUTB(tf->nsect, hwif->io_ports[IDE_NSECTOR_OFFSET]);
hwif->OUTB(tf->nsect, io_ports->nsect_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
hwif->OUTB(tf->lbal, hwif->io_ports[IDE_SECTOR_OFFSET]);
hwif->OUTB(tf->lbal, io_ports->lbal_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
hwif->OUTB(tf->lbam, hwif->io_ports[IDE_LCYL_OFFSET]);
hwif->OUTB(tf->lbam, io_ports->lbam_addr);
if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
hwif->OUTB(tf->lbah, hwif->io_ports[IDE_HCYL_OFFSET]);
hwif->OUTB(tf->lbah, io_ports->lbah_addr);
if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
hwif->OUTB((tf->device & HIHI) | drive->select.all,
hwif->io_ports[IDE_SELECT_OFFSET]);
io_ports->device_addr);
}
int taskfile_lib_get_identify (ide_drive_t *drive, u8 *buf)
......@@ -155,8 +155,7 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task)
switch (task->data_phase) {
case TASKFILE_MULTI_OUT:
case TASKFILE_OUT:
hwif->OUTBSYNC(drive, tf->command,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTBSYNC(drive, tf->command, hwif->io_ports.command_addr);
ndelay(400); /* FIXME */
return pre_task_out_intr(drive, task->rq);
case TASKFILE_MULTI_IN:
......
drivers/ide/ide.c
View file @ fba5c1af
This diff is collapsed.
drivers/ide/legacy/ali14xx.c
View file @ fba5c1af
......@@ -116,7 +116,7 @@ static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
int time1, time2;
u8 param1, param2, param3, param4;
unsigned long flags;
int bus_speed = system_bus_clock();
int bus_speed = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
/* calculate timing, according to PIO mode */
time1 = ide_pio_cycle_time(drive, pio);
......@@ -202,7 +202,7 @@ static const struct ide_port_info ali14xx_port_info = {
.name = DRV_NAME,
.chipset = ide_ali14xx,
.port_ops = &ali14xx_port_ops,
.host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_NO_AUTOTUNE,
.host_flags = IDE_HFLAG_NO_DMA,
.pio_mask = ATA_PIO4,
};
......@@ -220,7 +220,7 @@ static int __init ali14xx_probe(void)
return ide_legacy_device_add(&ali14xx_port_info, 0);
}
int probe_ali14xx;
static int probe_ali14xx;
module_param_named(probe, probe_ali14xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
......
drivers/ide/legacy/buddha.c
View file @ fba5c1af
......@@ -102,7 +102,7 @@ static int buddha_ack_intr(ide_hwif_t *hwif)
{
unsigned char ch;
ch = z_readb(hwif->io_ports[IDE_IRQ_OFFSET]);
ch = z_readb(hwif->io_ports.irq_addr);
if (!(ch & 0x80))
return 0;
return 1;
......@@ -112,9 +112,9 @@ static int xsurf_ack_intr(ide_hwif_t *hwif)
{
unsigned char ch;
ch = z_readb(hwif->io_ports[IDE_IRQ_OFFSET]);
ch = z_readb(hwif->io_ports.irq_addr);
/* X-Surf needs a 0 written to IRQ register to ensure ISA bit A11 stays at 0 */
z_writeb(0, hwif->io_ports[IDE_IRQ_OFFSET]);
z_writeb(0, hwif->io_ports.irq_addr);
if (!(ch & 0x80))
return 0;
return 1;
......@@ -128,13 +128,13 @@ static void __init buddha_setup_ports(hw_regs_t *hw, unsigned long base,
memset(hw, 0, sizeof(*hw));
hw->io_ports[IDE_DATA_OFFSET] = base;
hw->io_ports.data_addr = base;
for (i = 1; i < 8; i++)
hw->io_ports[i] = base + 2 + i * 4;
hw->io_ports_array[i] = base + 2 + i * 4;
hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
hw->io_ports.ctl_addr = ctl;
hw->io_ports.irq_addr = irq_port;
hw->irq = IRQ_AMIGA_PORTS;
hw->ack_intr = ack_intr;
......
drivers/ide/legacy/dtc2278.c
View file @ fba5c1af
......@@ -101,8 +101,7 @@ static const struct ide_port_info dtc2278_port_info __initdata = {
IDE_HFLAG_IO_32BIT |
/* disallow ->io_32bit changes */
IDE_HFLAG_NO_IO_32BIT |
IDE_HFLAG_NO_DMA |
IDE_HFLAG_NO_AUTOTUNE,
IDE_HFLAG_NO_DMA,
.pio_mask = ATA_PIO4,
};
......@@ -131,7 +130,7 @@ static int __init dtc2278_probe(void)
return ide_legacy_device_add(&dtc2278_port_info, 0);
}
int probe_dtc2278 = 0;
static int probe_dtc2278;
module_param_named(probe, probe_dtc2278, bool, 0);
MODULE_PARM_DESC(probe, "probe for DTC2278xx chipsets");
......
drivers/ide/legacy/falconide.c
View file @ fba5c1af
......@@ -50,12 +50,12 @@ static void __init falconide_setup_ports(hw_regs_t *hw)
memset(hw, 0, sizeof(*hw));
hw->io_ports[IDE_DATA_OFFSET] = ATA_HD_BASE;
hw->io_ports.data_addr = ATA_HD_BASE;
for (i = 1; i < 8; i++)
hw->io_ports[i] = ATA_HD_BASE + 1 + i * 4;
hw->io_ports_array[i] = ATA_HD_BASE + 1 + i * 4;
hw->io_ports[IDE_CONTROL_OFFSET] = ATA_HD_BASE + ATA_HD_CONTROL;
hw->io_ports.ctl_addr = ATA_HD_BASE + ATA_HD_CONTROL;
hw->irq = IRQ_MFP_IDE;
hw->ack_intr = NULL;
......
drivers/ide/legacy/gayle.c
View file @ fba5c1af
......@@ -63,6 +63,8 @@
#define GAYLE_HAS_CONTROL_REG (!ide_doubler)
#define GAYLE_IDEREG_SIZE (ide_doubler ? 0x1000 : 0x2000)
int ide_doubler = 0; /* support IDE doublers? */
module_param_named(doubler, ide_doubler, bool, 0);
MODULE_PARM_DESC(doubler, "enable support for IDE doublers");
#endif /* CONFIG_BLK_DEV_IDEDOUBLER */
......@@ -74,7 +76,7 @@ static int gayle_ack_intr_a4000(ide_hwif_t *hwif)
{
unsigned char ch;
ch = z_readb(hwif->io_ports[IDE_IRQ_OFFSET]);
ch = z_readb(hwif->io_ports.irq_addr);
if (!(ch & GAYLE_IRQ_IDE))
return 0;
return 1;
......@@ -84,11 +86,11 @@ static int gayle_ack_intr_a1200(ide_hwif_t *hwif)
{
unsigned char ch;
ch = z_readb(hwif->io_ports[IDE_IRQ_OFFSET]);
ch = z_readb(hwif->io_ports.irq_addr);
if (!(ch & GAYLE_IRQ_IDE))
return 0;
(void)z_readb(hwif->io_ports[IDE_STATUS_OFFSET]);
z_writeb(0x7c, hwif->io_ports[IDE_IRQ_OFFSET]);
(void)z_readb(hwif->io_ports.status_addr);
z_writeb(0x7c, hwif->io_ports.irq_addr);
return 1;
}
......@@ -100,13 +102,13 @@ static void __init gayle_setup_ports(hw_regs_t *hw, unsigned long base,
memset(hw, 0, sizeof(*hw));
hw->io_ports[IDE_DATA_OFFSET] = base;
hw->io_ports.data_addr = base;
for (i = 1; i < 8; i++)
hw->io_ports[i] = base + 2 + i * 4;
hw->io_ports_array[i] = base + 2 + i * 4;
hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
hw->io_ports.ctl_addr = ctl;
hw->io_ports.irq_addr = irq_port;
hw->irq = IRQ_AMIGA_PORTS;
hw->ack_intr = ack_intr;
......
drivers/ide/legacy/ht6560b.c
View file @ fba5c1af
......@@ -157,8 +157,8 @@ static void ht6560b_selectproc (ide_drive_t *drive)
/*
* Set timing for this drive:
*/
outb(timing, hwif->io_ports[IDE_SELECT_OFFSET]);
(void)inb(hwif->io_ports[IDE_STATUS_OFFSET]);
outb(timing, hwif->io_ports.device_addr);
(void)inb(hwif->io_ports.status_addr);
#ifdef DEBUG
printk("ht6560b: %s: select=%#x timing=%#x\n",
drive->name, select, timing);
......@@ -212,8 +212,8 @@ static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio)
{
int active_time, recovery_time;
int active_cycles, recovery_cycles;
int bus_speed = system_bus_clock();
int bus_speed = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
if (pio) {
unsigned int cycle_time;
......@@ -323,7 +323,7 @@ static void __init ht6560b_port_init_devs(ide_hwif_t *hwif)
hwif->drives[1].drive_data = t;
}
int probe_ht6560b = 0;
static int probe_ht6560b;
module_param_named(probe, probe_ht6560b, bool, 0);
MODULE_PARM_DESC(probe, "probe for HT6560B chipset");
......@@ -340,7 +340,6 @@ static const struct ide_port_info ht6560b_port_info __initdata = {
.port_ops = &ht6560b_port_ops,
.host_flags = IDE_HFLAG_SERIALIZE | /* is this needed? */
IDE_HFLAG_NO_DMA |
IDE_HFLAG_NO_AUTOTUNE |
IDE_HFLAG_ABUSE_PREFETCH,
.pio_mask = ATA_PIO4,
};
......
drivers/ide/legacy/ide-4drives.c
View file @ fba5c1af
......@@ -6,7 +6,7 @@
#define DRV_NAME "ide-4drives"
int probe_4drives;
static int probe_4drives;
module_param_named(probe, probe_4drives, bool, 0);
MODULE_PARM_DESC(probe, "probe for generic IDE chipset with 4 drives/port");
......
drivers/ide/legacy/ide-cs.c
View file @ fba5c1af
......@@ -140,8 +140,8 @@ static void ide_detach(struct pcmcia_device *link)
ide_release(link);
release_region(hwif->io_ports[IDE_CONTROL_OFFSET], 1);
release_region(hwif->io_ports[IDE_DATA_OFFSET], 8);
release_region(hwif->io_ports.ctl_addr, 1);
release_region(hwif->io_ports.data_addr, 8);
kfree(info);
} /* ide_detach */
......@@ -183,11 +183,7 @@ static ide_hwif_t *idecs_register(unsigned long io, unsigned long ctl,
i = hwif->index;
if (hwif->present)
ide_unregister(i);
else
ide_init_port_data(hwif, i);
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->port_ops = &idecs_port_ops;
......@@ -390,7 +386,7 @@ void ide_release(struct pcmcia_device *link)
if (info->ndev) {
/* FIXME: if this fails we need to queue the cleanup somehow
-- need to investigate the required PCMCIA magic */
ide_unregister(hwif->index);
ide_unregister(hwif);
}
info->ndev = 0;
......
drivers/ide/legacy/ide_platform.c
View file @ fba5c1af
......@@ -30,14 +30,14 @@ static void __devinit plat_ide_setup_ports(hw_regs_t *hw,
unsigned long port = (unsigned long)base;
int i;
hw->io_ports[IDE_DATA_OFFSET] = port;
hw->io_ports.data_addr = port;
port += (1 << pdata->ioport_shift);
for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET;
for (i = 1; i <= 7;
i++, port += (1 << pdata->ioport_shift))
hw->io_ports[i] = port;
hw->io_ports_array[i] = port;
hw->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;
hw->io_ports.ctl_addr = (unsigned long)ctrl;
hw->irq = irq;
......@@ -120,7 +120,7 @@ static int __devexit plat_ide_remove(struct platform_device *pdev)
{
ide_hwif_t *hwif = pdev->dev.driver_data;
ide_unregister(hwif->index);
ide_unregister(hwif);
return 0;
}
......
drivers/ide/legacy/macide.c
View file @ fba5c1af
......@@ -72,9 +72,9 @@ static void __init macide_setup_ports(hw_regs_t *hw, unsigned long base,
memset(hw, 0, sizeof(*hw));
for (i = 0; i < 8; i++)
hw->io_ports[i] = base + i * 4;
hw->io_ports_array[i] = base + i * 4;
hw->io_ports[IDE_CONTROL_OFFSET] = base + IDE_CONTROL;
hw->io_ports.ctl_addr = base + IDE_CONTROL;
hw->irq = irq;
hw->ack_intr = ack_intr;
......
drivers/ide/legacy/q40ide.c
View file @ fba5c1af
......@@ -80,10 +80,10 @@ void q40_ide_setup_ports ( hw_regs_t *hw,
for (i = 0; i < IDE_NR_PORTS; i++) {
/* BIG FAT WARNING:
assumption: only DATA port is ever used in 16 bit mode */
if ( i==0 )
hw->io_ports[i] = Q40_ISA_IO_W(base + offsets[i]);
if (i == 0)
hw->io_ports_array[i] = Q40_ISA_IO_W(base + offsets[i]);
else
hw->io_ports[i] = Q40_ISA_IO_B(base + offsets[i]);
hw->io_ports_array[i] = Q40_ISA_IO_B(base + offsets[i]);
}
hw->irq = irq;
......
drivers/ide/legacy/qd65xx.c
View file @ fba5c1af
......@@ -11,11 +11,7 @@
*
* QDI QD6500/QD6580 EIDE controller fast support
*
* Please set local bus speed using kernel parameter idebus
* for example, "idebus=33" stands for 33Mhz VLbus
* To activate controller support, use "ide0=qd65xx"
* To enable tuning, use "hda=autotune hdb=autotune"
* To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
*/
/*
......@@ -114,17 +110,18 @@ static void qd65xx_select(ide_drive_t *drive)
static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
u8 active_cycle,recovery_cycle;
int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
u8 act_cyc, rec_cyc;
if (system_bus_clock()<=33) {
active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
if (clk <= 33) {
act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
} else {
active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
}
return((recovery_cycle<<4) | 0x08 | active_cycle);
return (rec_cyc << 4) | 0x08 | act_cyc;
}
/*
......@@ -135,10 +132,13 @@ static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery
static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
u8 act_cyc, rec_cyc;
return((recovery_cycle<<4) | active_cycle);
act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
return (rec_cyc << 4) | act_cyc;
}
/*
......@@ -322,8 +322,7 @@ static const struct ide_port_info qd65xx_port_info __initdata = {
.name = DRV_NAME,
.chipset = ide_qd65xx,
.host_flags = IDE_HFLAG_IO_32BIT |
IDE_HFLAG_NO_DMA |
IDE_HFLAG_NO_AUTOTUNE,
IDE_HFLAG_NO_DMA,
.pio_mask = ATA_PIO4,
};
......@@ -399,7 +398,7 @@ static int __init qd_probe(int base)
return rc;
}
int probe_qd65xx = 0;
static int probe_qd65xx;
module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
......
drivers/ide/legacy/umc8672.c
View file @ fba5c1af
......@@ -130,7 +130,7 @@ static const struct ide_port_info umc8672_port_info __initdata = {
.name = DRV_NAME,
.chipset = ide_umc8672,
.port_ops = &umc8672_port_ops,
.host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_NO_AUTOTUNE,
.host_flags = IDE_HFLAG_NO_DMA,
.pio_mask = ATA_PIO4,
};
......@@ -158,7 +158,7 @@ static int __init umc8672_probe(void)
return ide_legacy_device_add(&umc8672_port_info, 0);
}
int probe_umc8672;
static int probe_umc8672;
module_param_named(probe, probe_umc8672, bool, 0);
MODULE_PARM_DESC(probe, "probe for UMC8672 chipset");
......
drivers/ide/mips/au1xxx-ide.c
View file @ fba5c1af
......@@ -502,12 +502,11 @@ static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif)
{
int i;
unsigned long *ata_regs = hw->io_ports;
unsigned long *ata_regs = hw->io_ports_array;
/* FIXME? */
for (i = 0; i < IDE_CONTROL_OFFSET; i++) {
for (i = 0; i < 8; i++)
*ata_regs++ = ahwif->regbase + (i << AU1XXX_ATA_REG_OFFSET);
}
/* set the Alternative Status register */
*ata_regs = ahwif->regbase + (14 << AU1XXX_ATA_REG_OFFSET);
......@@ -627,7 +626,7 @@ static int au_ide_remove(struct device *dev)
ide_hwif_t *hwif = dev_get_drvdata(dev);
_auide_hwif *ahwif = &auide_hwif;
ide_unregister(hwif->index);
ide_unregister(hwif);
iounmap((void *)ahwif->regbase);
......
drivers/ide/mips/swarm.c
View file @ fba5c1af
......@@ -113,10 +113,10 @@ static int __devinit swarm_ide_probe(struct device *dev)
hwif->chipset = ide_generic;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
hwif->io_ports[i] =
for (i = 0; i <= 7; i++)
hwif->io_ports_array[i] =
(unsigned long)(base + ((0x1f0 + i) << 5));
hwif->io_ports[IDE_CONTROL_OFFSET] =
hwif->io_ports.ctl_addr =
(unsigned long)(base + (0x3f6 << 5));
hwif->irq = K_INT_GB_IDE;
......
drivers/ide/pci/aec62xx.c
View file @ fba5c1af
......@@ -140,7 +140,7 @@ static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
{
int bus_speed = system_bus_clock();
int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
if (bus_speed <= 33)
pci_set_drvdata(dev, (void *) aec6xxx_33_base);
......
drivers/ide/pci/alim15x3.c
View file @ fba5c1af
......@@ -38,8 +38,6 @@
#include <asm/io.h>
#define DISPLAY_ALI_TIMINGS
/*
* ALi devices are not plug in. Otherwise these static values would
* need to go. They ought to go away anyway
......@@ -49,236 +47,6 @@ static u8 m5229_revision;
static u8 chip_is_1543c_e;
static struct pci_dev *isa_dev;
#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
#include <linux/stat.h>
#include <linux/proc_fs.h>
static u8 ali_proc = 0;
static struct pci_dev *bmide_dev;
static char *fifo[4] = {
"FIFO Off",
"FIFO On ",
"DMA mode",
"PIO mode" };
static char *udmaT[8] = {
"1.5T",
" 2T",
"2.5T",
" 3T",
"3.5T",
" 4T",
" 6T",
" 8T"
};
static char *channel_status[8] = {
"OK ",
"busy ",
"DRQ ",
"DRQ busy ",
"error ",
"error busy ",
"error DRQ ",
"error DRQ busy"
};
/**
* ali_get_info - generate proc file for ALi IDE
* @buffer: buffer to fill
* @addr: address of user start in buffer
* @offset: offset into 'file'
* @count: buffer count
*
* Walks the Ali devices and outputs summary data on the tuning and
* anything else that will help with debugging
*/
static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
{
unsigned long bibma;
u8 reg53h, reg5xh, reg5yh, reg5xh1, reg5yh1, c0, c1, rev, tmp;
char *q, *p = buffer;
/* fetch rev. */
pci_read_config_byte(bmide_dev, 0x08, &rev);
if (rev >= 0xc1) /* M1543C or newer */
udmaT[7] = " ???";
else
fifo[3] = " ??? ";
/* first fetch bibma: */
bibma = pci_resource_start(bmide_dev, 4);
/*
* at that point bibma+0x2 et bibma+0xa are byte
* registers to investigate:
*/
c0 = inb(bibma + 0x02);
c1 = inb(bibma + 0x0a);
p += sprintf(p,
"\n Ali M15x3 Chipset.\n");
p += sprintf(p,
" ------------------\n");
pci_read_config_byte(bmide_dev, 0x78, &reg53h);
p += sprintf(p, "PCI Clock: %d.\n", reg53h);
pci_read_config_byte(bmide_dev, 0x53, &reg53h);
p += sprintf(p,
"CD_ROM FIFO:%s, CD_ROM DMA:%s\n",
(reg53h & 0x02) ? "Yes" : "No ",
(reg53h & 0x01) ? "Yes" : "No " );
pci_read_config_byte(bmide_dev, 0x74, &reg53h);
p += sprintf(p,
"FIFO Status: contains %d Words, runs%s%s\n\n",
(reg53h & 0x3f),
(reg53h & 0x40) ? " OVERWR" : "",
(reg53h & 0x80) ? " OVERRD." : "." );
p += sprintf(p,
"-------------------primary channel"
"-------------------secondary channel"
"---------\n\n");
pci_read_config_byte(bmide_dev, 0x09, &reg53h);
p += sprintf(p,
"channel status: %s"
" %s\n",
(reg53h & 0x20) ? "On " : "Off",
(reg53h & 0x10) ? "On " : "Off" );
p += sprintf(p,
"both channels togth: %s"
" %s\n",
(c0&0x80) ? "No " : "Yes",
(c1&0x80) ? "No " : "Yes" );
pci_read_config_byte(bmide_dev, 0x76, &reg53h);
p += sprintf(p,
"Channel state: %s %s\n",
channel_status[reg53h & 0x07],
channel_status[(reg53h & 0x70) >> 4] );
pci_read_config_byte(bmide_dev, 0x58, &reg5xh);
pci_read_config_byte(bmide_dev, 0x5c, &reg5yh);
p += sprintf(p,
"Add. Setup Timing: %dT"
" %dT\n",
(reg5xh & 0x07) ? (reg5xh & 0x07) : 8,
(reg5yh & 0x07) ? (reg5yh & 0x07) : 8 );
pci_read_config_byte(bmide_dev, 0x59, &reg5xh);
pci_read_config_byte(bmide_dev, 0x5d, &reg5yh);
p += sprintf(p,
"Command Act. Count: %dT"
" %dT\n"
"Command Rec. Count: %dT"
" %dT\n\n",
(reg5xh & 0x70) ? ((reg5xh & 0x70) >> 4) : 8,
(reg5yh & 0x70) ? ((reg5yh & 0x70) >> 4) : 8,
(reg5xh & 0x0f) ? (reg5xh & 0x0f) : 16,
(reg5yh & 0x0f) ? (reg5yh & 0x0f) : 16 );
p += sprintf(p,
"----------------drive0-----------drive1"
"------------drive0-----------drive1------\n\n");
p += sprintf(p,
"DMA enabled: %s %s"
" %s %s\n",
(c0&0x20) ? "Yes" : "No ",
(c0&0x40) ? "Yes" : "No ",
(c1&0x20) ? "Yes" : "No ",
(c1&0x40) ? "Yes" : "No " );
pci_read_config_byte(bmide_dev, 0x54, &reg5xh);
pci_read_config_byte(bmide_dev, 0x55, &reg5yh);
q = "FIFO threshold: %2d Words %2d Words"
" %2d Words %2d Words\n";
if (rev < 0xc1) {
if ((rev == 0x20) &&
(pci_read_config_byte(bmide_dev, 0x4f, &tmp), (tmp &= 0x20))) {
p += sprintf(p, q, 8, 8, 8, 8);
} else {
p += sprintf(p, q,
(reg5xh & 0x03) + 12,
((reg5xh & 0x30)>>4) + 12,
(reg5yh & 0x03) + 12,
((reg5yh & 0x30)>>4) + 12 );
}
} else {
int t1 = (tmp = (reg5xh & 0x03)) ? (tmp << 3) : 4;
int t2 = (tmp = ((reg5xh & 0x30)>>4)) ? (tmp << 3) : 4;
int t3 = (tmp = (reg5yh & 0x03)) ? (tmp << 3) : 4;
int t4 = (tmp = ((reg5yh & 0x30)>>4)) ? (tmp << 3) : 4;
p += sprintf(p, q, t1, t2, t3, t4);
}
#if 0
p += sprintf(p,
"FIFO threshold: %2d Words %2d Words"
" %2d Words %2d Words\n",
(reg5xh & 0x03) + 12,
((reg5xh & 0x30)>>4) + 12,
(reg5yh & 0x03) + 12,
((reg5yh & 0x30)>>4) + 12 );
#endif
p += sprintf(p,
"FIFO mode: %s %s %s %s\n",
fifo[((reg5xh & 0x0c) >> 2)],
fifo[((reg5xh & 0xc0) >> 6)],
fifo[((reg5yh & 0x0c) >> 2)],
fifo[((reg5yh & 0xc0) >> 6)] );
pci_read_config_byte(bmide_dev, 0x5a, &reg5xh);
pci_read_config_byte(bmide_dev, 0x5b, &reg5xh1);
pci_read_config_byte(bmide_dev, 0x5e, &reg5yh);
pci_read_config_byte(bmide_dev, 0x5f, &reg5yh1);
p += sprintf(p,/*
"------------------drive0-----------drive1"
"------------drive0-----------drive1------\n")*/
"Dt RW act. Cnt %2dT %2dT"
" %2dT %2dT\n"
"Dt RW rec. Cnt %2dT %2dT"
" %2dT %2dT\n\n",
(reg5xh & 0x70) ? ((reg5xh & 0x70) >> 4) : 8,
(reg5xh1 & 0x70) ? ((reg5xh1 & 0x70) >> 4) : 8,
(reg5yh & 0x70) ? ((reg5yh & 0x70) >> 4) : 8,
(reg5yh1 & 0x70) ? ((reg5yh1 & 0x70) >> 4) : 8,
(reg5xh & 0x0f) ? (reg5xh & 0x0f) : 16,
(reg5xh1 & 0x0f) ? (reg5xh1 & 0x0f) : 16,
(reg5yh & 0x0f) ? (reg5yh & 0x0f) : 16,
(reg5yh1 & 0x0f) ? (reg5yh1 & 0x0f) : 16 );
p += sprintf(p,
"-----------------------------------UDMA Timings"
"--------------------------------\n\n");
pci_read_config_byte(bmide_dev, 0x56, &reg5xh);
pci_read_config_byte(bmide_dev, 0x57, &reg5yh);
p += sprintf(p,
"UDMA: %s %s"
" %s %s\n"
"UDMA timings: %s %s"
" %s %s\n\n",
(reg5xh & 0x08) ? "OK" : "No",
(reg5xh & 0x80) ? "OK" : "No",
(reg5yh & 0x08) ? "OK" : "No",
(reg5yh & 0x80) ? "OK" : "No",
udmaT[(reg5xh & 0x07)],
udmaT[(reg5xh & 0x70) >> 4],
udmaT[reg5yh & 0x07],
udmaT[(reg5yh & 0x70) >> 4] );
return p-buffer; /* => must be less than 4k! */
}
#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
/**
* ali_set_pio_mode - set host controller for PIO mode
* @drive: drive
......@@ -294,7 +62,7 @@ static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
int s_time, a_time, c_time;
u8 s_clc, a_clc, r_clc;
unsigned long flags;
int bus_speed = system_bus_clock();
int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
int port = hwif->channel ? 0x5c : 0x58;
int portFIFO = hwif->channel ? 0x55 : 0x54;
u8 cd_dma_fifo = 0;
......@@ -465,14 +233,6 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
if (!ali_proc) {
ali_proc = 1;
bmide_dev = dev;
ide_pci_create_host_proc("ali", ali_get_info);
}
#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
local_irq_save(flags);
if (m5229_revision < 0xC2) {
......
drivers/ide/pci/amd74xx.c
View file @ fba5c1af
......@@ -179,7 +179,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev,
* Determine the system bus clock.
*/
amd_clock = system_bus_clock() * 1000;
amd_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
switch (amd_clock) {
case 33000: amd_clock = 33333; break;
......
drivers/ide/pci/cmd640.c
View file @ fba5c1af
......@@ -111,10 +111,7 @@
#define DRV_NAME "cmd640"
/*
* This flag is set in ide.c by the parameter: ide0=cmd640_vlb
*/
int cmd640_vlb;
static int cmd640_vlb;
/*
* CMD640 specific registers definition.
......@@ -350,12 +347,12 @@ static int __init secondary_port_responding(void)
spin_lock_irqsave(&cmd640_lock, flags);
outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */
outb_p(0x0a, 0x176); /* select drive0 */
udelay(100);
if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
if ((inb_p(0x176) & 0x1f) != 0x0a) {
outb_p(0x1a, 0x176); /* select drive1 */
udelay(100);
if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
if ((inb_p(0x176) & 0x1f) != 0x1a) {
spin_unlock_irqrestore(&cmd640_lock, flags);
return 0; /* nothing responded */
}
......@@ -383,6 +380,7 @@ static void cmd640_dump_regs(void)
}
#endif
#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
/*
* Check whether prefetch is on for a drive,
* and initialize the unmask flags for safe operation.
......@@ -403,9 +401,7 @@ static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
drive->no_io_32bit = 0;
}
}
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
#else
/*
* Sets prefetch mode for a drive.
*/
......@@ -461,34 +457,6 @@ static inline u8 pack_nibbles(u8 upper, u8 lower)
return ((upper & 0x0f) << 4) | (lower & 0x0f);
}
/*
* This routine retrieves the initial drive timings from the chipset.
*/
static void __init retrieve_drive_counts(unsigned int index)
{
u8 b;
/*
* Get the internal setup timing, and convert to clock count
*/
b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
switch (b) {
case 0x00: b = 4; break;
case 0x80: b = 3; break;
case 0x40: b = 2; break;
default: b = 5; break;
}
setup_counts[index] = b;
/*
* Get the active/recovery counts
*/
b = get_cmd640_reg(drwtim_regs[index]);
active_counts[index] = (b >> 4) ? (b >> 4) : 0x10;
recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
}
/*
* This routine writes the prepared setup/active/recovery counts
* for a drive into the cmd640 chipset registers to active them.
......@@ -555,7 +523,14 @@ static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
{
int setup_time, active_time, recovery_time, clock_time;
u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
int bus_speed = system_bus_clock();
int bus_speed;
if (cmd640_vlb && ide_vlb_clk)
bus_speed = ide_vlb_clk;
else if (!cmd640_vlb && ide_pci_clk)
bus_speed = ide_pci_clk;
else
bus_speed = system_bus_clock();
if (pio_mode > 5)
pio_mode = 5;
......@@ -679,7 +654,6 @@ static const struct ide_port_info cmd640_port_info __initdata = {
.chipset = ide_cmd640,
.host_flags = IDE_HFLAG_SERIALIZE |
IDE_HFLAG_NO_DMA |
IDE_HFLAG_NO_AUTOTUNE |
IDE_HFLAG_ABUSE_PREFETCH |
IDE_HFLAG_ABUSE_FAST_DEVSEL,
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
......@@ -862,29 +836,16 @@ static int __init cmd640x_init(void)
}
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
if (drive->autotune || ((index > 1) && second_port_toggled)) {
/*
* Reset timing to the slowest speed and turn off
* prefetch. This way, the drive identify code has
* a better chance.
*/
setup_counts [index] = 4; /* max possible */
active_counts [index] = 16; /* max possible */
recovery_counts [index] = 16; /* max possible */
program_drive_counts(drive, index);
set_prefetch_mode(drive, index, 0);
printk("cmd640: drive%d timings/prefetch cleared\n", index);
} else {
/*
* Record timings/prefetch without changing them.
* This preserves any prior BIOS setup.
*/
retrieve_drive_counts (index);
check_prefetch(drive, index);
printk("cmd640: drive%d timings/prefetch(%s) preserved",
index, drive->no_io_32bit ? "off" : "on");
display_clocks(index);
}
/*
* Reset timing to the slowest speed and turn off prefetch.
* This way, the drive identify code has a better chance.
*/
setup_counts [index] = 4; /* max possible */
active_counts [index] = 16; /* max possible */
recovery_counts [index] = 16; /* max possible */
program_drive_counts(drive, index);
set_prefetch_mode(drive, index, 0);
printk("cmd640: drive%d timings/prefetch cleared\n", index);
#else
/*
* Set the drive unmask flags to match the prefetch setting
......
drivers/ide/pci/cmd64x.c
View file @ fba5c1af
......@@ -68,8 +68,8 @@ static u8 quantize_timing(int timing, int quant)
*/
static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
{
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
int clock_time = 1000 / system_bus_clock();
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock());
u8 cycle_count, active_count, recovery_count, drwtim;
static const u8 recovery_values[] =
{15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
......@@ -128,7 +128,7 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
ide_pio_timings[pio].active_time);
setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
1000 / system_bus_clock());
1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock()));
/*
* The primary channel has individual address setup timing registers
......
drivers/ide/pci/cy82c693.c
View file @ fba5c1af
......@@ -18,8 +18,6 @@
* hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
* - this is my first linux driver, so there's probably a lot of room
* for optimizations and bug fixing, so feel free to do it.
* - use idebus=xx parameter to set PCI bus speed - needed to calc
* timings for PIO modes (default will be 40)
* - if using PIO mode it's a good idea to set the PIO mode and
* 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
* - I had some problems with my IBM DHEA with PIO modes < 2
......@@ -136,7 +134,7 @@ static int calc_clk(int time, int bus_speed)
static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
{
int clk1, clk2;
int bus_speed = system_bus_clock(); /* get speed of PCI bus */
int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
/* we don't check against CY82C693's min and max speed,
* so you can play with the idebus=xx parameter
......
drivers/ide/pci/delkin_cb.c
View file @ fba5c1af
......@@ -87,11 +87,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
i = hwif->index;
if (hwif->present)
ide_unregister(i);
else
ide_init_port_data(hwif, i);
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
hwif->port_ops = &delkin_cb_port_ops;
......@@ -123,8 +119,7 @@ delkin_cb_remove (struct pci_dev *dev)
{
ide_hwif_t *hwif = pci_get_drvdata(dev);
if (hwif)
ide_unregister(hwif->index);
ide_unregister(hwif);
pci_release_regions(dev);
pci_disable_device(dev);
......
drivers/ide/pci/hpt366.c
View file @ fba5c1af
......@@ -760,7 +760,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
}
} else
outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
hwif->io_ports[IDE_CONTROL_OFFSET]);
hwif->io_ports.ctl_addr);
}
/*
......
drivers/ide/pci/ns87415.c
View file @ fba5c1af
......@@ -72,8 +72,8 @@ static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
base = pci_resource_start(pdev, port * 2) & ~3;
dmabase = pci_resource_start(pdev, 4) & ~3;
superio_ide_status[port] = base + IDE_STATUS_OFFSET;
superio_ide_select[port] = base + IDE_SELECT_OFFSET;
superio_ide_status[port] = base + 7;
superio_ide_select[port] = base + 6;
superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
/* Clear error/interrupt, enable dma */
......@@ -231,12 +231,12 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
* SELECT_DRIVE() properly during first ide_probe_port().
*/
timeout = 10000;
outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
outb(12, hwif->io_ports.ctl_addr);
udelay(10);
outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
outb(8, hwif->io_ports.ctl_addr);
do {
udelay(50);
stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = hwif->INB(hwif->io_ports.status_addr);
if (stat == 0xff)
break;
} while ((stat & BUSY_STAT) && --timeout);
......@@ -244,7 +244,7 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
}
if (!using_inta)
hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]);
hwif->irq = ide_default_irq(hwif->io_ports.data_addr);
else if (!hwif->irq && hwif->mate && hwif->mate->irq)
hwif->irq = hwif->mate->irq; /* share IRQ with mate */
......
drivers/ide/pci/opti621.c
View file @ fba5c1af
......@@ -53,8 +53,7 @@
* If you then set the second drive to another PIO, the old value
* (automatically selected) will be overrided by yours.
* There is a 25/33MHz switch in configuration
* register, but driver is written for use at any frequency which get
* (use idebus=xx to select PCI bus speed).
* register, but driver is written for use at any frequency.
*
* Version 0.1, Nov 8, 1996
* by Jaromir Koutek, for 2.1.8.
......@@ -210,7 +209,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks)
{
if (pio != PIO_NOT_EXIST) {
int adr_setup, data_pls;
int bus_speed = system_bus_clock();
int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
adr_setup = ide_pio_timings[pio].setup_time;
data_pls = ide_pio_timings[pio].active_time;
......@@ -280,7 +279,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
spin_lock_irqsave(&opti621_lock, flags);
reg_base = hwif->io_ports[IDE_DATA_OFFSET];
reg_base = hwif->io_ports.data_addr;
/* allow Register-B */
outb(0xc0, reg_base + CNTRL_REG);
......
drivers/ide/pci/scc_pata.c
View file @ fba5c1af
......@@ -334,7 +334,7 @@ static int scc_dma_end(ide_drive_t *drive)
/* errata A308 workaround: Step5 (check data loss) */
/* We don't check non ide_disk because it is limited to UDMA4 */
if (!(in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET])
if (!(in_be32((void __iomem *)hwif->io_ports.ctl_addr)
& ERR_STAT) &&
drive->media == ide_disk && drive->current_speed > XFER_UDMA_4) {
reg = in_be32((void __iomem *)intsts_port);
......@@ -438,7 +438,7 @@ static int scc_dma_test_irq(ide_drive_t *drive)
u32 int_stat = in_be32((void __iomem *)hwif->dma_base + 0x014);
/* SCC errata A252,A308 workaround: Step4 */
if ((in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET])
if ((in_be32((void __iomem *)hwif->io_ports.ctl_addr)
& ERR_STAT) &&
(int_stat & INTSTS_INTRQ))
return 1;
......@@ -534,8 +534,8 @@ static int scc_ide_setup_pci_device(struct pci_dev *dev,
}
memset(&hw, 0, sizeof(hw));
for (i = IDE_DATA_OFFSET; i <= IDE_CONTROL_OFFSET; i++)
hw.io_ports[i] = ports->dma + 0x20 + i * 4;
for (i = 0; i <= 8; i++)
hw.io_ports_array[i] = ports->dma + 0x20 + i * 4;
hw.irq = dev->irq;
hw.dev = &dev->dev;
hw.chipset = ide_pci;
......@@ -763,9 +763,8 @@ static void __devexit scc_remove(struct pci_dev *dev)
hwif->dmatable_cpu = NULL;
}
ide_unregister(hwif->index);
ide_unregister(hwif);
hwif->chipset = ide_unknown;
iounmap((void*)ports->dma);
iounmap((void*)ports->ctl);
pci_release_selected_regions(dev, (1 << 2) - 1);
......
drivers/ide/pci/sgiioc4.c
View file @ fba5c1af
......@@ -98,28 +98,28 @@ sgiioc4_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
int i;
/* Registers are word (32 bit) aligned */
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
hw->io_ports[i] = reg + i * 4;
for (i = 0; i <= 7; i++)
hw->io_ports_array[i] = reg + i * 4;
if (ctrl_port)
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
hw->io_ports.ctl_addr = ctrl_port;
if (irq_port)
hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
hw->io_ports.irq_addr = irq_port;
}
static void
sgiioc4_maskproc(ide_drive_t * drive, int mask)
{
writeb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
(void __iomem *)drive->hwif->io_ports[IDE_CONTROL_OFFSET]);
(void __iomem *)drive->hwif->io_ports.ctl_addr);
}
static int
sgiioc4_checkirq(ide_hwif_t * hwif)
{
unsigned long intr_addr =
hwif->io_ports[IDE_IRQ_OFFSET] + IOC4_INTR_REG * 4;
hwif->io_ports.irq_addr + IOC4_INTR_REG * 4;
if ((u8)readl((void __iomem *)intr_addr) & 0x03)
return 1;
......@@ -134,8 +134,8 @@ sgiioc4_clearirq(ide_drive_t * drive)
{
u32 intr_reg;
ide_hwif_t *hwif = HWIF(drive);
unsigned long other_ir =
hwif->io_ports[IDE_IRQ_OFFSET] + (IOC4_INTR_REG << 2);
struct ide_io_ports *io_ports = &hwif->io_ports;
unsigned long other_ir = io_ports->irq_addr + (IOC4_INTR_REG << 2);
/* Code to check for PCI error conditions */
intr_reg = readl((void __iomem *)other_ir);
......@@ -147,12 +147,12 @@ sgiioc4_clearirq(ide_drive_t * drive)
* a "clear" status if it got cleared. If not, then spin
* for a bit trying to clear it.
*/
u8 stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
u8 stat = sgiioc4_INB(io_ports->status_addr);
int count = 0;
stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = sgiioc4_INB(io_ports->status_addr);
while ((stat & 0x80) && (count++ < 100)) {
udelay(1);
stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
stat = sgiioc4_INB(io_ports->status_addr);
}
if (intr_reg & 0x02) {
......@@ -162,9 +162,9 @@ sgiioc4_clearirq(ide_drive_t * drive)
pci_stat_cmd_reg;
pci_err_addr_low =
readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]);
readl((void __iomem *)io_ports->irq_addr);
pci_err_addr_high =
readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4));
readl((void __iomem *)(io_ports->irq_addr + 4));
pci_read_config_dword(dev, PCI_COMMAND,
&pci_stat_cmd_reg);
printk(KERN_ERR
......@@ -573,7 +573,6 @@ static const struct ide_port_info sgiioc4_port_info __devinitdata = {
.init_dma = ide_dma_sgiioc4,
.port_ops = &sgiioc4_port_ops,
.dma_ops = &sgiioc4_dma_ops,
.host_flags = IDE_HFLAG_NO_AUTOTUNE,
.mwdma_mask = ATA_MWDMA2_ONLY,
};
......
drivers/ide/pci/siimage.c
View file @ fba5c1af
......@@ -622,9 +622,10 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
struct pci_dev *dev = to_pci_dev(hwif->dev);
void *addr = pci_get_drvdata(dev);
u8 ch = hwif->channel;
hw_regs_t hw;
unsigned long base;
struct ide_io_ports *io_ports = &hwif->io_ports;
/*
* Fill in the basic HWIF bits
*/
......@@ -638,7 +639,7 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
* based I/O
*/
memset(&hw, 0, sizeof(hw_regs_t));
memset(io_ports, 0, sizeof(*io_ports));
base = (unsigned long)addr;
if (ch)
......@@ -651,17 +652,15 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
* so we can't currently use it sanely since we want to
* use LBA48 mode.
*/
hw.io_ports[IDE_DATA_OFFSET] = base;
hw.io_ports[IDE_ERROR_OFFSET] = base + 1;
hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2;
hw.io_ports[IDE_SECTOR_OFFSET] = base + 3;
hw.io_ports[IDE_LCYL_OFFSET] = base + 4;
hw.io_ports[IDE_HCYL_OFFSET] = base + 5;
hw.io_ports[IDE_SELECT_OFFSET] = base + 6;
hw.io_ports[IDE_STATUS_OFFSET] = base + 7;
hw.io_ports[IDE_CONTROL_OFFSET] = base + 10;
hw.io_ports[IDE_IRQ_OFFSET] = 0;
io_ports->data_addr = base;
io_ports->error_addr = base + 1;
io_ports->nsect_addr = base + 2;
io_ports->lbal_addr = base + 3;
io_ports->lbam_addr = base + 4;
io_ports->lbah_addr = base + 5;
io_ports->device_addr = base + 6;
io_ports->status_addr = base + 7;
io_ports->ctl_addr = base + 10;
if (pdev_is_sata(dev)) {
base = (unsigned long)addr;
......@@ -672,8 +671,6 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
hwif->sata_scr[SATA_CONTROL_OFFSET] = base + 0x100;
}
memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
hwif->irq = dev->irq;
hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00);
......
drivers/ide/pci/trm290.c
View file @ fba5c1af
......@@ -298,7 +298,7 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
if (old != compat && old_mask == 0xff) {
/* leave lower 10 bits untouched */
compat += (next_offset += 0x400);
hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2;
hwif->io_ports.ctl_addr = compat + 2;
outw(compat | 1, hwif->config_data);
new = inw(hwif->config_data);
printk(KERN_INFO "%s: control basereg workaround: "
......
drivers/ide/pci/via82cxxx.c
View file @ fba5c1af
......@@ -340,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
* Determine system bus clock.
*/
via_clock = system_bus_clock() * 1000;
via_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
switch (via_clock) {
case 33000: via_clock = 33333; break;
......
drivers/ide/ppc/mpc8xx.c
View file @ fba5c1af
......@@ -131,7 +131,7 @@ static int pcmcia_schlvl = PCMCIA_SCHLVL;
#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
{
unsigned long *p = hw->io_ports;
unsigned long *p = hw->io_ports_array;
int i;
typedef struct {
......@@ -314,7 +314,7 @@ static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
#if defined(CONFIG_IDE_EXT_DIRECT)
static int __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
{
unsigned long *p = hw->io_ports;
unsigned long *p = hw->io_ports_array;
int i;
u32 ide_phy_base;
......@@ -811,24 +811,28 @@ static int __init mpc8xx_ide_probe(void)
#ifdef IDE0_BASE_OFFSET
memset(&hw, 0, sizeof(hw));
if (!m8xx_ide_init_ports(&hw, 0)) {
ide_hwif_t *hwif = &ide_hwifs[0];
ide_hwif_t *hwif = ide_find_port();
ide_init_port_hw(hwif, &hw);
hwif->pio_mask = ATA_PIO4;
hwif->port_ops = &m8xx_port_ops;
if (hwif) {
ide_init_port_hw(hwif, &hw);
hwif->pio_mask = ATA_PIO4;
hwif->port_ops = &m8xx_port_ops;
idx[0] = 0;
idx[0] = hwif->index;
}
}
#ifdef IDE1_BASE_OFFSET
memset(&hw, 0, sizeof(hw));
if (!m8xx_ide_init_ports(&hw, 1)) {
ide_hwif_t *mate = &ide_hwifs[1];
ide_hwif_t *mate = ide_find_port();
ide_init_port_hw(mate, &hw);
mate->pio_mask = ATA_PIO4;
mate->port_ops = &m8xx_port_ops;
if (mate) {
ide_init_port_hw(mate, &hw);
mate->pio_mask = ATA_PIO4;
mate->port_ops = &m8xx_port_ops;
idx[1] = 1;
idx[1] = mate->index;
}
}
#endif
#endif
......
drivers/ide/ppc/pmac.c
View file @ fba5c1af
......@@ -417,7 +417,7 @@ static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
#define PMAC_IDE_REG(x) \
((void __iomem *)((drive)->hwif->io_ports[IDE_DATA_OFFSET] + (x)))
((void __iomem *)((drive)->hwif->io_ports.data_addr + (x)))
/*
* Apply the timings of the proper unit (master/slave) to the shared
......@@ -1086,8 +1086,9 @@ static void __devinit pmac_ide_init_ports(hw_regs_t *hw, unsigned long base)
int i;
for (i = 0; i < 8; ++i)
hw->io_ports[i] = base + i * 0x10;
hw->io_ports[8] = base + 0x160;
hw->io_ports_array[i] = base + i * 0x10;
hw->io_ports.ctl_addr = base + 0x160;
}
/*
......
drivers/scsi/ide-scsi.c
View file @ fba5c1af
......@@ -258,8 +258,7 @@ idescsi_atapi_error(ide_drive_t *drive, struct request *rq, u8 stat, u8 err)
if (ide_read_status(drive) & (BUSY_STAT | DRQ_STAT))
/* force an abort */
hwif->OUTB(WIN_IDLEIMMEDIATE,
hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_IDLEIMMEDIATE, hwif->io_ports.command_addr);
rq->errors++;
......@@ -410,9 +409,9 @@ static ide_startstop_t idescsi_pc_intr (ide_drive_t *drive)
idescsi_end_request (drive, 1, 0);
return ide_stopped;
}
bcount = (hwif->INB(hwif->io_ports[IDE_BCOUNTH_OFFSET]) << 8) |
hwif->INB(hwif->io_ports[IDE_BCOUNTL_OFFSET]);
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]);
bcount = (hwif->INB(hwif->io_ports.lbah_addr) << 8) |
hwif->INB(hwif->io_ports.lbam_addr);
ireason = hwif->INB(hwif->io_ports.nsect_addr);
if (ireason & CD) {
printk(KERN_ERR "ide-scsi: CoD != 0 in idescsi_pc_intr\n");
......@@ -485,7 +484,7 @@ static ide_startstop_t idescsi_transfer_pc(ide_drive_t *drive)
"initiated yet DRQ isn't asserted\n");
return startstop;
}
ireason = hwif->INB(hwif->io_ports[IDE_IREASON_OFFSET]);
ireason = hwif->INB(hwif->io_ports.nsect_addr);
if ((ireason & CD) == 0 || (ireason & IO)) {
printk(KERN_ERR "ide-scsi: (IO,CoD) != (0,1) while "
"issuing a packet command\n");
......@@ -575,7 +574,7 @@ static ide_startstop_t idescsi_issue_pc(ide_drive_t *drive,
return ide_started;
} else {
/* Issue the packet command */
hwif->OUTB(WIN_PACKETCMD, hwif->io_ports[IDE_COMMAND_OFFSET]);
hwif->OUTB(WIN_PACKETCMD, hwif->io_ports.command_addr);
return idescsi_transfer_pc(drive);
}
}
......
include/asm-arm/arch-sa1100/ide.h
View file @ fba5c1af
......@@ -37,12 +37,12 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
memset(hw, 0, sizeof(*hw));
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
for (i = 0; i <= 7; i++) {
hw->io_ports_array[i] = reg;
reg += regincr;
}
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
hw->io_ports.ctl_addr = ctrl_port;
if (irq)
*irq = 0;
......
include/asm-cris/arch-v10/ide.h
View file @ fba5c1af
......@@ -59,22 +59,19 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, u
int i;
/* fill in ports for ATA addresses 0 to 7 */
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = data_port |
for (i = 0; i <= 7; i++) {
hw->io_ports_array[i] = data_port |
IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
IO_STATE(R_ATA_CTRL_DATA, cs0, active);
}
/* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
hw->io_ports.ctl_addr = data_port |
IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
IO_STATE(R_ATA_CTRL_DATA, cs1, active);
/* whats this for ? */
hw->io_ports[IDE_IRQ_OFFSET] = 0;
hw->io_ports.irq_addr = 0;
}
static inline void ide_init_default_hwifs(void)
......
include/linux/ide.h
View file @ fba5c1af
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