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Commit fbe4a49f authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'stm32-dt-for-v5.4-1' of... 

Merge tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.4, round 1

Highlights:
----------

MPU part:
 -Add FMC2 NAND controller support on stm32mp157c-ev1.
 -Add M4 remoteproc support:
  -Add support in stm32mp157c.dtsi.
  -Declare copro reserved memories region on stm32mp157 EV1 and DK1
   boards.
  -Enable M4 copro support on stm32mp157 EV1 and DK1.
 -Add booster for ADC on stm32mp157c.
 -Add audio codec support on stm32mp157 DK1.

MCU part:
 -Remove fixed regulator unit address on stm32429i-eval used by ADC.
 -Add missing vdd-supply required by ADC on stm32429i-eval and
  stm32h743i-eval.
 -Add pwm cells on f746 and f429.

* tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
  ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
  ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
  ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
  ARM: dts: stm32: add syscfg to ADC on stm32mp157c
  ARM: dts: stm32: add pwm cells to stm32f746
  ARM: dts: stm32: add pwm cells to stm32f429
  ARM: dts: stm32: add pwm cells to stm32mp157c
  ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
  ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
  ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
  ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
  ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
  ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
  ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
  ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
  ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
  ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
  ARM: dts: stm32: enable FMC2 NAND controller on stm32mp157c-ev1
  ARM: dts: stm32: add FMC2 NAND controller pins muxing on stm32mp157c-ev1
  ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
  ...

Link: https://lore.kernel.org/r/482a2a40-a246-6654-7e3b-8e38b137752f@st.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d1406583 49490d51
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Showing with 342 additions and 37 deletions
arch/arm/boot/dts/stm32429i-eval.dts
View file @ fbe4a49f
......@@ -81,18 +81,18 @@ soc {
dma-ranges = <0xc0000000 0x0 0x10000000>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdda: regulator-vdda {
compatible = "regulator-fixed";
regulator-name = "vdda";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vref: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vref: regulator-vref {
compatible = "regulator-fixed";
regulator-name = "vref";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
leds {
......@@ -157,7 +157,8 @@ mmc_vcard: mmc_vcard {
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc3_in8_pin>;
vref-supply = <&reg_vref>;
vdda-supply = <&vdda>;
vref-supply = <&vref>;
status = "okay";
adc3: adc@200 {
st,adc-channels = <8>;
......
arch/arm/boot/dts/stm32f429.dtsi
View file @ fbe4a49f
......@@ -112,6 +112,7 @@ timers2: timers@40000000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -141,6 +142,7 @@ timers3: timers@40000400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -170,6 +172,7 @@ timers4: timers@40000800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -198,6 +201,7 @@ timers5: timers@40000c00 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -267,6 +271,7 @@ timers12: timers@40001800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -288,6 +293,7 @@ timers13: timers@40001c00 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -303,6 +309,7 @@ timers14: timers@40002000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -448,6 +455,7 @@ timers1: timers@40010000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -469,6 +477,7 @@ timers8: timers@40010400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -602,6 +611,7 @@ timers9: timers@40014000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -623,6 +633,7 @@ timers10: timers@40014400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -638,6 +649,7 @@ timers11: timers@40014800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......
arch/arm/boot/dts/stm32f746.dtsi
View file @ fbe4a49f
......@@ -94,6 +94,7 @@ timers2: timers@40000000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -123,6 +124,7 @@ timers3: timers@40000400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -152,6 +154,7 @@ timers4: timers@40000800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -180,6 +183,7 @@ timers5: timers@40000c00 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -249,6 +253,7 @@ timers12: timers@40001800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -270,6 +275,7 @@ timers13: timers@40001c00 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -285,6 +291,7 @@ timers14: timers@40002000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -419,6 +426,7 @@ timers1: timers@40010000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -440,6 +448,7 @@ timers8: timers@40010400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -512,6 +521,7 @@ timers9: timers@40014000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -533,6 +543,7 @@ timers10: timers@40014400 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......@@ -548,6 +559,7 @@ timers11: timers@40014800 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
};
......
arch/arm/boot/dts/stm32h743i-eval.dts
View file @ fbe4a49f
......@@ -87,6 +87,7 @@ usbotg_hs_phy: usb-phy {
};
&adc_12 {
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
adc1: adc@0 {
......
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
View file @ fbe4a49f
......@@ -24,8 +24,6 @@ gpioa: gpio@50002000 {
reg = <0x0 0x400>;
clocks = <&rcc GPIOA>;
st,bank-name = "GPIOA";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 0 16>;
status = "disabled";
};
......@@ -37,8 +35,6 @@ gpiob: gpio@50003000 {
reg = <0x1000 0x400>;
clocks = <&rcc GPIOB>;
st,bank-name = "GPIOB";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 16 16>;
status = "disabled";
};
......@@ -50,8 +46,6 @@ gpioc: gpio@50004000 {
reg = <0x2000 0x400>;
clocks = <&rcc GPIOC>;
st,bank-name = "GPIOC";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 32 16>;
status = "disabled";
};
......@@ -63,8 +57,6 @@ gpiod: gpio@50005000 {
reg = <0x3000 0x400>;
clocks = <&rcc GPIOD>;
st,bank-name = "GPIOD";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 48 16>;
status = "disabled";
};
......@@ -76,8 +68,6 @@ gpioe: gpio@50006000 {
reg = <0x4000 0x400>;
clocks = <&rcc GPIOE>;
st,bank-name = "GPIOE";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 64 16>;
status = "disabled";
};
......@@ -89,8 +79,6 @@ gpiof: gpio@50007000 {
reg = <0x5000 0x400>;
clocks = <&rcc GPIOF>;
st,bank-name = "GPIOF";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 80 16>;
status = "disabled";
};
......@@ -102,8 +90,6 @@ gpiog: gpio@50008000 {
reg = <0x6000 0x400>;
clocks = <&rcc GPIOG>;
st,bank-name = "GPIOG";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 96 16>;
status = "disabled";
};
......@@ -115,8 +101,6 @@ gpioh: gpio@50009000 {
reg = <0x7000 0x400>;
clocks = <&rcc GPIOH>;
st,bank-name = "GPIOH";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 112 16>;
status = "disabled";
};
......@@ -128,8 +112,6 @@ gpioi: gpio@5000a000 {
reg = <0x8000 0x400>;
clocks = <&rcc GPIOI>;
st,bank-name = "GPIOI";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 128 16>;
status = "disabled";
};
......@@ -141,8 +123,6 @@ gpioj: gpio@5000b000 {
reg = <0x9000 0x400>;
clocks = <&rcc GPIOJ>;
st,bank-name = "GPIOJ";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 144 16>;
status = "disabled";
};
......@@ -154,8 +134,6 @@ gpiok: gpio@5000c000 {
reg = <0xa000 0x400>;
clocks = <&rcc GPIOK>;
st,bank-name = "GPIOK";
ngpios = <8>;
gpio-ranges = <&pinctrl 0 160 8>;
status = "disabled";
};
......@@ -276,6 +254,50 @@ pins1 {
};
};
fmc_pins_a: fmc-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
<STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
<STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
<STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
<STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
bias-pull-up;
};
};
fmc_sleep_pins_a: fmc-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
<STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
<STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
<STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
<STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
<STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
<STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
<STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
<STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
<STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
<STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
<STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
<STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
<STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
......@@ -530,7 +552,7 @@ pins2 {
};
};
m_can1_sleep_pins_a: m_can1-sleep@0 {
m_can1_sleep_pins_a: m_can1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
<STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
......@@ -849,8 +871,6 @@ gpioz: gpio@54004000 {
clocks = <&rcc GPIOZ>;
st,bank-name = "GPIOZ";
st,bank-ioport = <11>;
ngpios = <8>;
gpio-ranges = <&pinctrl_z 0 400 8>;
status = "disabled";
};
......
arch/arm/boot/dts/stm32mp157a-dk1.dts
View file @ fbe4a49f
......@@ -33,6 +33,42 @@ reserved-memory {
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@d4000000 {
reg = <0xd4000000 0x4000000>;
no-map;
......@@ -48,6 +84,17 @@ blue {
default-state = "off";
};
};
sound {
compatible = "audio-graph-card";
label = "STM32MP1-DK";
routing =
"Playback" , "MCLK",
"Capture" , "MCLK",
"MICL" , "Mic Bias";
dais = <&sai2a_port &sai2b_port>;
status = "okay";
};
};
&cec {
......@@ -116,6 +163,39 @@ sii9022_in: endpoint {
};
};
};
cs42l51: cs42l51@4a {
compatible = "cirrus,cs42l51";
reg = <0x4a>;
#sound-dai-cells = <0>;
VL-supply = <&v3v3>;
VD-supply = <&v1v8_audio>;
VA-supply = <&v1v8_audio>;
VAHP-supply = <&v1v8_audio>;
reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
clocks = <&sai2a>;
clock-names = "MCLK";
status = "okay";
cs42l51_port: port {
#address-cells = <1>;
#size-cells = <0>;
cs42l51_tx_endpoint: endpoint@0 {
reg = <0>;
remote-endpoint = <&sai2a_endpoint>;
frame-master;
bitclock-master;
};
cs42l51_rx_endpoint: endpoint@1 {
reg = <1>;
remote-endpoint = <&sai2b_endpoint>;
frame-master;
bitclock-master;
};
};
};
};
&i2c4 {
......@@ -289,6 +369,16 @@ ltdc_ep0_out: endpoint@0 {
};
};
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
&rng1 {
status = "okay";
};
......@@ -297,6 +387,51 @@ &rtc {
status = "okay";
};
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
status = "okay";
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&cs42l51_tx_endpoint>;
format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
};
};
sai2b: audio-controller@4400b024 {
dma-names = "rx";
st,sync = <&sai2a 2>;
clocks = <&rcc SAI2_K>, <&sai2a>;
clock-names = "sai_ck", "MCLK";
status = "okay";
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&cs42l51_rx_endpoint>;
format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
......
arch/arm/boot/dts/stm32mp157c-ed1.dts
View file @ fbe4a49f
......@@ -28,6 +28,42 @@ reserved-memory {
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
gpu_reserved: gpu@e8000000 {
reg = <0xe8000000 0x8000000>;
no-map;
......@@ -233,6 +269,16 @@ &iwdg2 {
status = "okay";
};
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
&rng1 {
status = "okay";
};
......
arch/arm/boot/dts/stm32mp157c-ev1.dts
View file @ fbe4a49f
......@@ -101,6 +101,7 @@ dcmi_0: endpoint {
&dsi {
#address-cells = <1>;
#size-cells = <0>;
phy-dsi-supply = <&reg18>;
status = "okay";
ports {
......@@ -157,6 +158,22 @@ phy0: ethernet-phy@0 {
};
};
&fmc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&fmc_pins_a>;
pinctrl-1 = <&fmc_sleep_pins_a>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <1>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
......
arch/arm/boot/dts/stm32mp157c.dtsi
View file @ fbe4a49f
......@@ -109,6 +109,12 @@ cooling-maps {
};
};
booster: regulator-booster {
compatible = "st,stm32mp1-booster";
st,syscfg = <&syscfg>;
status = "disabled";
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -133,6 +139,7 @@ timers2: timer@40000000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -161,6 +168,7 @@ timers3: timer@40001000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -187,6 +195,7 @@ timers4: timer@40002000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -215,6 +224,7 @@ timers5: timer@40003000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -272,6 +282,7 @@ timers12: timer@40006000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -293,6 +304,7 @@ timers13: timer@40007000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -314,6 +326,7 @@ timers14: timer@40008000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -567,6 +580,7 @@ timers1: timer@44000000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -597,6 +611,7 @@ timers8: timer@44001000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -670,6 +685,7 @@ timers15: timer@44006000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -694,6 +710,7 @@ timers16: timer@44007000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
timer@15 {
......@@ -717,6 +734,7 @@ timers17: timer@44008000 {
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
status = "disabled";
};
......@@ -983,6 +1001,7 @@ adc: adc@48003000 {
clocks = <&rcc ADC12>, <&rcc ADC12_K>;
clock-names = "bus", "adc";
interrupt-controller;
st,syscfg = <&syscfg>;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -1239,11 +1258,33 @@ mdma1: dma@58000000 {
dma-requests = <48>;
};
fmc: nand-controller@58002000 {
compatible = "st,stm32mp15-fmc2";
reg = <0x58002000 0x1000>,
<0x80000000 0x1000>,
<0x88010000 0x1000>,
<0x88020000 0x1000>,
<0x81000000 0x1000>,
<0x89010000 0x1000>,
<0x89020000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
<&mdma1 20 0x10 0x12000a08 0x0 0x0>,
<&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
dma-names = "tx", "rx", "ecc";
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
status = "disabled";
};
qspi: spi@58003000 {
compatible = "st,stm32f469-qspi";
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
reg-names = "qspi", "qspi_mm";
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
<&mdma1 22 0x10 0x100008 0x0 0x0>;
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
status = "disabled";
......@@ -1448,4 +1489,24 @@ i2c6: i2c@5c009000 {
status = "disabled";
};
};
mlahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
dma-ranges = <0x00000000 0x38000000 0x10000>,
<0x10000000 0x10000000 0x60000>,
<0x30000000 0x30000000 0x60000>;
m4_rproc: m4@10000000 {
compatible = "st,stm32mp1-m4";
reg = <0x10000000 0x40000>,
<0x30000000 0x40000>,
<0x38000000 0x10000>;
resets = <&rcc MCU_R>;
st,syscfg-holdboot = <&rcc 0x10C 0x1>;
st,syscfg-tz = <&rcc 0x000 0x1>;
status = "disabled";
};
};
};
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