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Commit fbeb1f19 authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6 

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  serial: Fix sh-sci break interrupt/sysrq handling.
  sh: Fix bogus regs pointer in do_IRQ().
  sh: Fix SH-3 cache entry_mask and way_size calculation.
  sh: Convert struct ioctls to static defines.
  sh: Define missing __NR_readahead.
  sh: Fix PCI BAR address-space wraparound.
parents 5851fadc 0b3d4ef6
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Showing with 53 additions and 46 deletions
arch/sh/drivers/pci/pci-auto.c
View file @ fbeb1f19
...@@ -214,6 +214,12 @@ pciauto_setup_bars(struct pci_channel *hose, ...@@ -214,6 +214,12 @@ pciauto_setup_bars(struct pci_channel *hose,
continue; continue;
} }
if (bar_value < *lower_limit || (bar_value + bar_size) >= *upper_limit) {
DBG(" unavailable -- skipping, value %x size %x\n",
bar_value, bar_size);
continue;
}
#ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES #ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES
/* Write it out and update our limit */ /* Write it out and update our limit */
early_write_config_dword(hose, top_bus, current_bus, pci_devfn, early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
......
arch/sh/kernel/cpu/init.c
View file @ fbeb1f19
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
* *
* CPU init code * CPU init code
* *
* Copyright (C) 2002 - 2006 Paul Mundt * Copyright (C) 2002 - 2007 Paul Mundt
* Copyright (C) 2003 Richard Curnow * Copyright (C) 2003 Richard Curnow
* *
* This file is subject to the terms and conditions of the GNU General Public * This file is subject to the terms and conditions of the GNU General Public
...@@ -48,8 +48,19 @@ static void __init cache_init(void) ...@@ -48,8 +48,19 @@ static void __init cache_init(void)
{ {
unsigned long ccr, flags; unsigned long ccr, flags;
if (current_cpu_data.type == CPU_SH_NONE) /* First setup the rest of the I-cache info */
panic("Unknown CPU"); current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
current_cpu_data.icache.linesz;
current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
current_cpu_data.icache.linesz;
/* And the D-cache too */
current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
current_cpu_data.dcache.linesz;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
jump_to_P2(); jump_to_P2();
ccr = ctrl_inl(CCR); ccr = ctrl_inl(CCR);
...@@ -200,6 +211,9 @@ asmlinkage void __init sh_cpu_init(void) ...@@ -200,6 +211,9 @@ asmlinkage void __init sh_cpu_init(void)
/* First, probe the CPU */ /* First, probe the CPU */
detect_cpu_and_cache_system(); detect_cpu_and_cache_system();
if (current_cpu_data.type == CPU_SH_NONE)
panic("Unknown CPU");
/* Init the cache */ /* Init the cache */
cache_init(); cache_init();
......
arch/sh/kernel/cpu/sh2/entry.S
View file @ fbeb1f19
...@@ -165,6 +165,7 @@ ENTRY(exception_handler) ...@@ -165,6 +165,7 @@ ENTRY(exception_handler)
interrupt_entry: interrupt_entry:
mov r9,r4 mov r9,r4
mov r15,r5
mov.l 6f,r9 mov.l 6f,r9
mov.l 7f,r8 mov.l 7f,r8
jmp @r8 jmp @r8
......
arch/sh/kernel/cpu/sh3/entry.S
View file @ fbeb1f19
...@@ -514,13 +514,16 @@ skip_save: ...@@ -514,13 +514,16 @@ skip_save:
interrupt_exception: interrupt_exception:
mov.l 1f, r9 mov.l 1f, r9
mov.l 2f, r4
mov.l @r4, r4
jmp @r9 jmp @r9
nop mov r15, r5
rts rts
nop nop
.align 2 .align 2
1: .long do_IRQ 1: .long do_IRQ
2: .long INTEVT
.align 2 .align 2
ENTRY(exception_none) ENTRY(exception_none)
......
arch/sh/kernel/cpu/sh4/probe.c
View file @ fbeb1f19
...@@ -195,13 +195,6 @@ int __init detect_cpu_and_cache_system(void) ...@@ -195,13 +195,6 @@ int __init detect_cpu_and_cache_system(void)
} }
/* Setup the rest of the I-cache info */
current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
current_cpu_data.icache.linesz;
current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
current_cpu_data.icache.linesz;
/* And the rest of the D-cache */ /* And the rest of the D-cache */
if (current_cpu_data.dcache.ways > 1) { if (current_cpu_data.dcache.ways > 1) {
size = sizes[(cvr >> 16) & 0xf]; size = sizes[(cvr >> 16) & 0xf];
...@@ -209,12 +202,6 @@ int __init detect_cpu_and_cache_system(void) ...@@ -209,12 +202,6 @@ int __init detect_cpu_and_cache_system(void)
current_cpu_data.dcache.sets = (size >> 6); current_cpu_data.dcache.sets = (size >> 6);
} }
current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
current_cpu_data.dcache.linesz;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
/* /*
* Setup the L2 cache desc * Setup the L2 cache desc
* *
......
arch/sh/kernel/irq.c
View file @ fbeb1f19
...@@ -11,7 +11,6 @@ ...@@ -11,7 +11,6 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/kernel_stat.h> #include <linux/kernel_stat.h>
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/io.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
...@@ -82,13 +81,9 @@ static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; ...@@ -82,13 +81,9 @@ static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
#endif #endif
asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{ {
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
struct pt_regs *old_regs = set_irq_regs(regs); struct pt_regs *old_regs = set_irq_regs(regs);
int irq;
#ifdef CONFIG_4KSTACKS #ifdef CONFIG_4KSTACKS
union irq_ctx *curctx, *irqctx; union irq_ctx *curctx, *irqctx;
#endif #endif
...@@ -111,13 +106,7 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5, ...@@ -111,13 +106,7 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
} }
#endif #endif
#ifdef CONFIG_CPU_HAS_INTEVT irq = irq_demux(evt2irq(irq));
irq = evt2irq(ctrl_inl(INTEVT));
#else
irq = r4;
#endif
irq = irq_demux(irq);
#ifdef CONFIG_4KSTACKS #ifdef CONFIG_4KSTACKS
curctx = (union irq_ctx *)current_thread_info(); curctx = (union irq_ctx *)current_thread_info();
......
drivers/serial/sh-sci.c
View file @ fbeb1f19
...@@ -17,6 +17,9 @@ ...@@ -17,6 +17,9 @@
* License. See the file "COPYING" in the main directory of this archive * License. See the file "COPYING" in the main directory of this archive
* for more details. * for more details.
*/ */
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
#undef DEBUG #undef DEBUG
...@@ -49,11 +52,6 @@ ...@@ -49,11 +52,6 @@
#endif #endif
#include <asm/sci.h> #include <asm/sci.h>
#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
#include "sh-sci.h" #include "sh-sci.h"
struct sci_port { struct sci_port {
...@@ -645,6 +643,9 @@ static inline int sci_handle_breaks(struct uart_port *port) ...@@ -645,6 +643,9 @@ static inline int sci_handle_breaks(struct uart_port *port)
struct tty_struct *tty = port->info->tty; struct tty_struct *tty = port->info->tty;
struct sci_port *s = &sci_ports[port->line]; struct sci_port *s = &sci_ports[port->line];
if (uart_handle_break(port))
return 0;
if (!s->break_flag && status & SCxSR_BRK(port)) { if (!s->break_flag && status & SCxSR_BRK(port)) {
#if defined(CONFIG_CPU_SH3) #if defined(CONFIG_CPU_SH3)
/* Debounce break */ /* Debounce break */
......
include/asm-sh/ioctls.h
View file @ fbeb1f19
...@@ -16,17 +16,17 @@ ...@@ -16,17 +16,17 @@
#define TCSETSW 0x5403 #define TCSETSW 0x5403
#define TCSETSF 0x5404 #define TCSETSF 0x5404
#define TCGETA _IOR('t', 23, struct termio) #define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
#define TCSETA _IOW('t', 24, struct termio) #define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
#define TCSETAW _IOW('t', 25, struct termio) #define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
#define TCSETAF _IOW('t', 28, struct termio) #define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */
#define TCSBRK _IO('t', 29) #define TCSBRK _IO('t', 29)
#define TCXONC _IO('t', 30) #define TCXONC _IO('t', 30)
#define TCFLSH _IO('t', 31) #define TCFLSH _IO('t', 31)
#define TIOCSWINSZ _IOW('t', 103, struct winsize) #define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
#define TIOCGWINSZ _IOR('t', 104, struct winsize) #define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ #define TIOCSTART _IO('t', 110) /* start output, like ^Q */
#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ #define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ #define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
...@@ -59,8 +59,8 @@ ...@@ -59,8 +59,8 @@
#define TIOCSSOFTCAR _IOW('T', 26, unsigned int) /* 0x541A */ #define TIOCSSOFTCAR _IOW('T', 26, unsigned int) /* 0x541A */
#define TIOCLINUX _IOW('T', 28, char) /* 0x541C */ #define TIOCLINUX _IOW('T', 28, char) /* 0x541C */
#define TIOCCONS _IO('T', 29) /* 0x541D */ #define TIOCCONS _IO('T', 29) /* 0x541D */
#define TIOCGSERIAL _IOR('T', 30, struct serial_struct) /* 0x541E */ #define TIOCGSERIAL 0x803C541E /* _IOR('T', 30, struct serial_struct) 0x541E */
#define TIOCSSERIAL _IOW('T', 31, struct serial_struct) /* 0x541F */ #define TIOCSSERIAL 0x403C541F /* _IOW('T', 31, struct serial_struct) 0x541F */
#define TIOCPKT _IOW('T', 32, int) /* 0x5420 */ #define TIOCPKT _IOW('T', 32, int) /* 0x5420 */
# define TIOCPKT_DATA 0 # define TIOCPKT_DATA 0
# define TIOCPKT_FLUSHREAD 1 # define TIOCPKT_FLUSHREAD 1
...@@ -86,12 +86,12 @@ ...@@ -86,12 +86,12 @@
#define TIOCSERSWILD _IOW('T', 85, int) /* 0x5455 */ #define TIOCSERSWILD _IOW('T', 85, int) /* 0x5455 */
#define TIOCGLCKTRMIOS 0x5456 #define TIOCGLCKTRMIOS 0x5456
#define TIOCSLCKTRMIOS 0x5457 #define TIOCSLCKTRMIOS 0x5457
#define TIOCSERGSTRUCT _IOR('T', 88, struct async_struct) /* 0x5458 */ /* For debugging only */ #define TIOCSERGSTRUCT 0x80d85458 /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */
#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */ #define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */
/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ # define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
#define TIOCSERGETMULTI _IOR('T', 90, struct serial_multiport_struct) /* 0x545A */ /* Get multiport config */ #define TIOCSERGETMULTI 0x80A8545A /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */
#define TIOCSERSETMULTI _IOW('T', 91, struct serial_multiport_struct) /* 0x545B */ /* Set multiport config */ #define TIOCSERSETMULTI 0x40A8545B /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */
#define TIOCMIWAIT _IO('T', 92) /* 0x545C */ /* wait for a change on serial input line(s) */ #define TIOCMIWAIT _IO('T', 92) /* 0x545C */ /* wait for a change on serial input line(s) */
#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
......
include/asm-sh/irq.h
View file @ fbeb1f19
...@@ -94,8 +94,13 @@ ...@@ -94,8 +94,13 @@
/* /*
* Convert back and forth between INTEVT and IRQ values. * Convert back and forth between INTEVT and IRQ values.
*/ */
#ifdef CONFIG_CPU_HAS_INTEVT
#define evt2irq(evt) (((evt) >> 5) - 16) #define evt2irq(evt) (((evt) >> 5) - 16)
#define irq2evt(irq) (((irq) + 16) << 5) #define irq2evt(irq) (((irq) + 16) << 5)
#else
#define evt2irq(evt) (evt)
#define irq2evt(irq) (irq)
#endif
/* /*
* Simple Mask Register Support * Simple Mask Register Support
......
include/asm-sh/unistd.h
View file @ fbeb1f19
...@@ -233,6 +233,7 @@ ...@@ -233,6 +233,7 @@
#define __NR_fcntl64 221 #define __NR_fcntl64 221
/* 223 is unused */ /* 223 is unused */
#define __NR_gettid 224 #define __NR_gettid 224
#define __NR_readahead 225
#define __NR_setxattr 226 #define __NR_setxattr 226
#define __NR_lsetxattr 227 #define __NR_lsetxattr 227
#define __NR_fsetxattr 228 #define __NR_fsetxattr 228
......
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