Commit fc2834a4 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'renesas-dt-for-v4.6' of...

Merge tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.6

* Use SCIF and USBHS fallback compatibility strings
* Add Baud Rate Generator (BRG) support for (H)SCIF
* Enable SCIF_CLK frequency and pins
* Use GIC_* defines
* Enable audio on r8a7793/gose
* Enable HDMI vidio out on r8a7793
* Enable i2c on r8a7793/gose
* Enable QSPI on alt
* Enable GPIO keys and leds on gise
* Enable audio on porter
* Enable DU on porter

* tag 'renesas-dt-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (68 commits)
  ARM: dts: silk: Enable SCIF_CLK frequency and pins
  ARM: dts: porter: Enable SCIF_CLK frequency and pins
  ARM: dts: marzen: Enable SCIF_CLK frequency and pins
  ARM: dts: lager: Enable SCIF_CLK frequency and pins
  ARM: dts: koelsch: Enable SCIF_CLK frequency and pins
  ARM: dts: gose: Enable SCIF_CLK frequency and pins
  ARM: dts: bockw: Enable SCIF_CLK frequency and pins
  ARM: dts: alt: Enable SCIF_CLK frequency and pins
  ARM: dts: r8a7794: Add BRG support for (H)SCIF
  ARM: dts: r8a7793: Add BRG support for SCIF
  ARM: dts: r8a7791: Add BRG support for (H)SCIF
  ARM: dts: r8a7790: Add BRG support for (H)SCIF
  ARM: dts: r8a7779: Add BRG support for SCIF
  ARM: dts: r8a7778: Add BRG support for SCIF
  ARM: dts: r8a7794: Rename the serial port clock to fck
  ARM: dts: r8a7793: Rename the serial port clock to fck
  ARM: dts: r8a7791: Rename the serial port clock to fck
  ARM: dts: r8a7790: Rename the serial port clock to fck
  ARM: dts: r8a7779: Rename the serial port clock to fck
  ARM: dts: r8a7778: Rename the serial port clock to fck
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f68a4535 c3373b09
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
/ { / {
...@@ -53,8 +54,8 @@ gic: interrupt-controller@e0020000 { ...@@ -53,8 +54,8 @@ gic: interrupt-controller@e0020000 {
pmu { pmu {
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<0 121 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
}; };
clocks@e0110000 { clocks@e0110000 {
...@@ -158,7 +159,7 @@ sti_sclk: sti_sclk { ...@@ -158,7 +159,7 @@ sti_sclk: sti_sclk {
timer@e0180000 { timer@e0180000 {
compatible = "renesas,em-sti"; compatible = "renesas,em-sti";
reg = <0xe0180000 0x54>; reg = <0xe0180000 0x54>;
interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sti_sclk>; clocks = <&sti_sclk>;
clock-names = "sclk"; clock-names = "sclk";
}; };
...@@ -166,7 +167,7 @@ timer@e0180000 { ...@@ -166,7 +167,7 @@ timer@e0180000 {
uart0: serial@e1020000 { uart0: serial@e1020000 {
compatible = "renesas,em-uart"; compatible = "renesas,em-uart";
reg = <0xe1020000 0x38>; reg = <0xe1020000 0x38>;
interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usia_u0_sclk>; clocks = <&usia_u0_sclk>;
clock-names = "sclk"; clock-names = "sclk";
}; };
...@@ -174,7 +175,7 @@ uart0: serial@e1020000 { ...@@ -174,7 +175,7 @@ uart0: serial@e1020000 {
uart1: serial@e1030000 { uart1: serial@e1030000 {
compatible = "renesas,em-uart"; compatible = "renesas,em-uart";
reg = <0xe1030000 0x38>; reg = <0xe1030000 0x38>;
interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u1_sclk>; clocks = <&usib_u1_sclk>;
clock-names = "sclk"; clock-names = "sclk";
}; };
...@@ -182,7 +183,7 @@ uart1: serial@e1030000 { ...@@ -182,7 +183,7 @@ uart1: serial@e1030000 {
uart2: serial@e1040000 { uart2: serial@e1040000 {
compatible = "renesas,em-uart"; compatible = "renesas,em-uart";
reg = <0xe1040000 0x38>; reg = <0xe1040000 0x38>;
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u2_sclk>; clocks = <&usib_u2_sclk>;
clock-names = "sclk"; clock-names = "sclk";
}; };
...@@ -190,7 +191,7 @@ uart2: serial@e1040000 { ...@@ -190,7 +191,7 @@ uart2: serial@e1040000 {
uart3: serial@e1050000 { uart3: serial@e1050000 {
compatible = "renesas,em-uart"; compatible = "renesas,em-uart";
reg = <0xe1050000 0x38>; reg = <0xe1050000 0x38>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&usib_u3_sclk>; clocks = <&usib_u3_sclk>;
clock-names = "sclk"; clock-names = "sclk";
}; };
...@@ -203,8 +204,8 @@ pfc: pfc@e0140200 { ...@@ -203,8 +204,8 @@ pfc: pfc@e0140200 {
gpio0: gpio@e0050000 { gpio0: gpio@e0050000 {
compatible = "renesas,em-gio"; compatible = "renesas,em-gio";
reg = <0xe0050000 0x2c>, <0xe0050040 0x20>; reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<0 68 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
gpio-ranges = <&pfc 0 0 32>; gpio-ranges = <&pfc 0 0 32>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -215,8 +216,8 @@ gpio0: gpio@e0050000 { ...@@ -215,8 +216,8 @@ gpio0: gpio@e0050000 {
gpio1: gpio@e0050080 { gpio1: gpio@e0050080 {
compatible = "renesas,em-gio"; compatible = "renesas,em-gio";
reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>; reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<0 70 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
gpio-ranges = <&pfc 0 32 32>; gpio-ranges = <&pfc 0 32 32>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -227,8 +228,8 @@ gpio1: gpio@e0050080 { ...@@ -227,8 +228,8 @@ gpio1: gpio@e0050080 {
gpio2: gpio@e0050100 { gpio2: gpio@e0050100 {
compatible = "renesas,em-gio"; compatible = "renesas,em-gio";
reg = <0xe0050100 0x2c>, <0xe0050140 0x20>; reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
<0 72 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
gpio-ranges = <&pfc 0 64 32>; gpio-ranges = <&pfc 0 64 32>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -239,8 +240,8 @@ gpio2: gpio@e0050100 { ...@@ -239,8 +240,8 @@ gpio2: gpio@e0050100 {
gpio3: gpio@e0050180 { gpio3: gpio@e0050180 {
compatible = "renesas,em-gio"; compatible = "renesas,em-gio";
reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>; reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<0 74 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
gpio-ranges = <&pfc 0 96 32>; gpio-ranges = <&pfc 0 96 32>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -251,8 +252,8 @@ gpio3: gpio@e0050180 { ...@@ -251,8 +252,8 @@ gpio3: gpio@e0050180 {
gpio4: gpio@e0050200 { gpio4: gpio@e0050200 {
compatible = "renesas,em-gio"; compatible = "renesas,em-gio";
reg = <0xe0050200 0x2c>, <0xe0050240 0x20>; reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
<0 76 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; gpio-controller;
gpio-ranges = <&pfc 0 128 31>; gpio-ranges = <&pfc 0 128 31>;
#gpio-cells = <2>; #gpio-cells = <2>;
...@@ -266,7 +267,7 @@ iic0: i2c@e0070000 { ...@@ -266,7 +267,7 @@ iic0: i2c@e0070000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-emev2"; compatible = "renesas,iic-emev2";
reg = <0xe0070000 0x28>; reg = <0xe0070000 0x28>;
interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic0_sclk>; clocks = <&iic0_sclk>;
clock-names = "sclk"; clock-names = "sclk";
status = "disabled"; status = "disabled";
...@@ -277,7 +278,7 @@ iic1: i2c@e10a0000 { ...@@ -277,7 +278,7 @@ iic1: i2c@e10a0000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-emev2"; compatible = "renesas,iic-emev2";
reg = <0xe10a0000 0x28>; reg = <0xe10a0000 0x28>;
interrupts = <0 33 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>;
clocks = <&iic1_sclk>; clocks = <&iic1_sclk>;
clock-names = "sclk"; clock-names = "sclk";
status = "disabled"; status = "disabled";
......
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...@@ -126,11 +126,19 @@ &tmu0 { ...@@ -126,11 +126,19 @@ &tmu0 {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: serial0 { scif0_pins: serial0 {
renesas,groups = "scif0_data_a", "scif0_ctrl"; renesas,groups = "scif0_data_a", "scif0_ctrl";
renesas,function = "scif0"; renesas,function = "scif0";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
mmc_pins: mmc { mmc_pins: mmc {
renesas,groups = "mmc_data8", "mmc_ctrl"; renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc"; renesas,function = "mmc";
...@@ -217,3 +225,8 @@ &scif0 { ...@@ -217,3 +225,8 @@ &scif0 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
This diff is collapsed.
...@@ -165,6 +165,9 @@ &tmu0 { ...@@ -165,6 +165,9 @@ &tmu0 {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
du_pins: du { du_pins: du {
du0 { du0 {
renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0"; renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
...@@ -176,6 +179,11 @@ du1 { ...@@ -176,6 +179,11 @@ du1 {
}; };
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk_b";
renesas,function = "scif_clk";
};
ethernet_pins: ethernet { ethernet_pins: ethernet {
intc { intc {
renesas,groups = "intc_irq1_b"; renesas,groups = "intc_irq1_b";
...@@ -222,6 +230,11 @@ &scif4 { ...@@ -222,6 +230,11 @@ &scif4 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&sdhi0 { &sdhi0 {
pinctrl-0 = <&sdhi0_pins>; pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
This diff is collapsed.
...@@ -291,6 +291,9 @@ &extal_clk { ...@@ -291,6 +291,9 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
du_pins: du { du_pins: du {
renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
renesas,function = "du"; renesas,function = "du";
...@@ -301,6 +304,11 @@ scif0_pins: serial0 { ...@@ -301,6 +304,11 @@ scif0_pins: serial0 {
renesas,function = "scif0"; renesas,function = "scif0";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -485,6 +493,11 @@ &scifa1 { ...@@ -485,6 +493,11 @@ &scifa1 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&msiof1 { &msiof1 {
pinctrl-0 = <&msiof1_pins>; pinctrl-0 = <&msiof1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
This diff is collapsed.
...@@ -320,6 +320,9 @@ &extal_clk { ...@@ -320,6 +320,9 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
i2c2_pins: i2c2 { i2c2_pins: i2c2 {
renesas,groups = "i2c2"; renesas,groups = "i2c2";
renesas,function = "i2c2"; renesas,function = "i2c2";
...@@ -340,6 +343,11 @@ scif1_pins: serial1 { ...@@ -340,6 +343,11 @@ scif1_pins: serial1 {
renesas,function = "scif1"; renesas,function = "scif1";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -440,6 +448,11 @@ &scif1 { ...@@ -440,6 +448,11 @@ &scif1 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&sdhi0 { &sdhi0 {
pinctrl-0 = <&sdhi0_pins>; pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -8,6 +8,17 @@ ...@@ -8,6 +8,17 @@
* kind, whether express or implied. * kind, whether express or implied.
*/ */
/*
* SSI-AK4642
*
* SW3: 1: AK4642
* 3: ADV7511
*
* This command is required before playback/capture:
*
* amixer set "LINEOUT Mixer DACL" on
*/
/dts-v1/; /dts-v1/;
#include "r8a7791.dtsi" #include "r8a7791.dtsi"
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -78,6 +89,53 @@ vccq_sdhi2: regulator@3 { ...@@ -78,6 +89,53 @@ vccq_sdhi2: regulator@3 {
states = <3300000 1 states = <3300000 1
1800000 0>; 1800000 0>;
}; };
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
x3_clk: x3-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
x16_clk: x16-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
x14_clk: x14-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
clock-output-names = "audio_clock";
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "left_j";
simple-audio-card,bitclock-master = <&soundcodec>;
simple-audio-card,frame-master = <&soundcodec>;
simple-audio-card,cpu {
sound-dai = <&rcar_sound>;
};
soundcodec: simple-audio-card,codec {
sound-dai = <&ak4642>;
clocks = <&x14_clk>;
};
};
}; };
&extal_clk { &extal_clk {
...@@ -85,11 +143,19 @@ &extal_clk { ...@@ -85,11 +143,19 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: serial0 { scif0_pins: serial0 {
renesas,groups = "scif0_data_d"; renesas,groups = "scif0_data_d";
renesas,function = "scif0"; renesas,function = "scif0";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -139,6 +205,21 @@ can0_pins: can0 { ...@@ -139,6 +205,21 @@ can0_pins: can0 {
renesas,groups = "can0_data"; renesas,groups = "can0_data";
renesas,function = "can0"; renesas,function = "can0";
}; };
du_pins: du {
renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
renesas,function = "du";
};
ssi_pins: sound {
renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
renesas,function = "ssi";
};
audio_clk_pins: audio_clk {
renesas,groups = "audio_clk_a";
renesas,function = "audio_clk";
};
}; };
&scif0 { &scif0 {
...@@ -148,6 +229,11 @@ &scif0 { ...@@ -148,6 +229,11 @@ &scif0 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&ether { &ether {
pinctrl-0 = <&ether_pins &phy1_pins>; pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -229,6 +315,12 @@ &i2c2 { ...@@ -229,6 +315,12 @@ &i2c2 {
status = "okay"; status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
ak4642: codec@12 {
compatible = "asahi-kasei,ak4642";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 { composite-in@20 {
compatible = "adi,adv7180"; compatible = "adi,adv7180";
reg = <0x20>; reg = <0x20>;
...@@ -241,6 +333,38 @@ adv7180: endpoint { ...@@ -241,6 +333,38 @@ adv7180: endpoint {
}; };
}; };
}; };
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
}; };
&sata0 { &sata0 {
...@@ -304,3 +428,44 @@ &can0 { ...@@ -304,3 +428,44 @@ &can0 {
status = "okay"; status = "okay";
}; };
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&mstp7_clks R8A7791_CLK_DU0>,
<&mstp7_clks R8A7791_CLK_DU1>,
<&mstp7_clks R8A7791_CLK_LVDS0>,
<&x3_clk>, <&x16_clk>;
clock-names = "du.0", "du.1", "lvds.0",
"dclkin.0", "dclkin.1";
ports {
port@1 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
};
};
&rcar_sound {
pinctrl-0 = <&ssi_pins &audio_clk_pins>;
pinctrl-names = "default";
status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
rcar_sound,dai {
dai0 {
playback = <&ssi0>;
capture = <&ssi1>;
};
};
};
&ssi1 {
shared-pin;
};
This diff is collapsed.
...@@ -8,6 +8,34 @@ ...@@ -8,6 +8,34 @@
* kind, whether express or implied. * kind, whether express or implied.
*/ */
/*
* SSI-AK4643
*
* SW1: 1: AK4643
* 2: CN22
* 3: ADV7511
*
* This command is required when Playback/Capture
*
* amixer set "LINEOUT Mixer DACL" on
* amixer set "DVC Out" 100%
* amixer set "DVC In" 100%
*
* You can use Mute
*
* amixer set "DVC Out Mute" on
* amixer set "DVC In Mute" on
*
* You can use Volume Ramp
*
* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
* amixer set "DVC Out Ramp" on
* aplay xxx.wav &
* amixer set "DVC Out" 80% // Volume Down
* amixer set "DVC Out" 100% // Volume Up
*/
/dts-v1/; /dts-v1/;
#include "r8a7793.dtsi" #include "r8a7793.dtsi"
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -31,6 +59,176 @@ memory@40000000 { ...@@ -31,6 +59,176 @@ memory@40000000 {
device_type = "memory"; device_type = "memory";
reg = <0 0x40000000 0 0x40000000>; reg = <0 0x40000000 0 0x40000000>;
}; };
gpio-keys {
compatible = "gpio-keys";
key-1 {
gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW2-1";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW2-2";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW2-3";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW2-4";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-a {
gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_A>;
label = "SW30";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-b {
gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_B>;
label = "SW31";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-c {
gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_C>;
label = "SW32";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-d {
gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_D>;
label = "SW33";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-e {
gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_E>;
label = "SW34";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-f {
gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_F>;
label = "SW35";
gpio-key,wakeup;
debounce-interval = <20>;
};
key-g {
gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_G>;
label = "SW36";
gpio-key,wakeup;
debounce-interval = <20>;
};
};
leds {
compatible = "gpio-leds";
led6 {
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
label = "LED6";
};
led7 {
gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
label = "LED7";
};
led8 {
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
label = "LED8";
};
};
audio_clock: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
compatible = "simple-audio-card";
simple-audio-card,format = "left_j";
simple-audio-card,bitclock-master = <&sndcodec>;
simple-audio-card,frame-master = <&sndcodec>;
sndcpu: simple-audio-card,cpu {
sound-dai = <&rcar_sound>;
};
sndcodec: simple-audio-card,codec {
sound-dai = <&ak4643>;
clocks = <&audio_clock>;
};
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
x2_clk: x2-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
x13_clk: x13-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&mstp7_clks R8A7793_CLK_DU0>,
<&mstp7_clks R8A7793_CLK_DU1>,
<&mstp7_clks R8A7793_CLK_LVDS0>,
<&x13_clk>, <&x2_clk>;
clock-names = "du.0", "du.1", "lvds.0",
"dclkin.0", "dclkin.1";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
port@1 {
lvds_connector: endpoint {
};
};
};
}; };
&extal_clk { &extal_clk {
...@@ -38,6 +236,19 @@ &extal_clk { ...@@ -38,6 +236,19 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
i2c2_pins: i2c2 {
renesas,groups = "i2c2";
renesas,function = "i2c2";
};
du_pins: du {
renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
renesas,function = "du";
};
scif0_pins: serial0 { scif0_pins: serial0 {
renesas,groups = "scif0_data_d"; renesas,groups = "scif0_data_d";
renesas,function = "scif0"; renesas,function = "scif0";
...@@ -48,6 +259,11 @@ scif1_pins: serial1 { ...@@ -48,6 +259,11 @@ scif1_pins: serial1 {
renesas,function = "scif1"; renesas,function = "scif1";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -62,6 +278,16 @@ qspi_pins: spi0 { ...@@ -62,6 +278,16 @@ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi"; renesas,function = "qspi";
}; };
sound_pins: sound {
renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
renesas,function = "ssi";
};
sound_clk_pins: sound_clk {
renesas,groups = "audio_clk_a";
renesas,function = "audio_clk";
};
}; };
&ether { &ether {
...@@ -98,6 +324,11 @@ &scif1 { ...@@ -98,6 +324,11 @@ &scif1 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&qspi { &qspi {
pinctrl-0 = <&qspi_pins>; pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -136,3 +367,76 @@ partition@440000 { ...@@ -136,3 +367,76 @@ partition@440000 {
}; };
}; };
}; };
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <100000>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
status = "okay";
rcar_sound,dai {
dai0 {
playback = <&ssi0 &src2 &dvc0>;
capture = <&ssi1 &src3 &dvc1>;
};
};
};
&ssi1 {
shared-pin;
};
This diff is collapsed.
...@@ -103,6 +103,9 @@ &extal_clk { ...@@ -103,6 +103,9 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
du_pins: du { du_pins: du {
renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0"; renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
renesas,function = "du"; renesas,function = "du";
...@@ -113,6 +116,11 @@ scif2_pins: serial2 { ...@@ -113,6 +116,11 @@ scif2_pins: serial2 {
renesas,function = "scif2"; renesas,function = "scif2";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -138,6 +146,13 @@ &cmt0 { ...@@ -138,6 +146,13 @@ &cmt0 {
status = "okay"; status = "okay";
}; };
&pfc {
qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
};
&ether { &ether {
pinctrl-0 = <&ether_pins &phy1_pins>; pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -197,3 +212,47 @@ &scif2 { ...@@ -197,3 +212,47 @@ &scif2 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "spansion,s25fl512s", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cpol;
spi-cpha;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "loader";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "system";
reg = <0x00040000 0x00040000>;
read-only;
};
partition@80000 {
label = "user";
reg = <0x00080000 0x03f80000>;
};
};
};
};
...@@ -64,6 +64,61 @@ vccq_sdhi1: regulator@4 { ...@@ -64,6 +64,61 @@ vccq_sdhi1: regulator@4 {
states = <3300000 1 states = <3300000 1
1800000 0>; 1800000 0>;
}; };
vga-encoder {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb1>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
vga {
compatible = "vga-connector";
port {
vga_in: endpoint {
remote-endpoint = <&adv7123_out>;
};
};
};
x2_clk: x2-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
x3_clk: x3-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
}; };
&extal_clk { &extal_clk {
...@@ -71,11 +126,19 @@ &extal_clk { ...@@ -71,11 +126,19 @@ &extal_clk {
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif2_pins: serial2 { scif2_pins: serial2 {
renesas,groups = "scif2_data"; renesas,groups = "scif2_data";
renesas,function = "scif2"; renesas,function = "scif2";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
...@@ -129,6 +192,11 @@ &scif2 { ...@@ -129,6 +192,11 @@ &scif2 {
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&ether { &ether {
pinctrl-0 = <&ether_pins &phy1_pins>; pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -164,6 +232,38 @@ adv7180: endpoint { ...@@ -164,6 +232,38 @@ adv7180: endpoint {
}; };
}; };
}; };
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
}; };
&mmcif0 { &mmcif0 {
...@@ -258,3 +358,25 @@ &pci1 { ...@@ -258,3 +358,25 @@ &pci1 {
&usbphy { &usbphy {
status = "okay"; status = "okay";
}; };
&du {
status = "okay";
clocks = <&mstp7_clks R8A7794_CLK_DU0>,
<&mstp7_clks R8A7794_CLK_DU0>,
<&x2_clk>, <&x3_clk>;
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
port@1 {
endpoint {
remote-endpoint = <&adv7123_in>;
};
};
};
};
This diff is collapsed.
This diff is collapsed.
...@@ -145,6 +145,8 @@ ...@@ -145,6 +145,8 @@
#define R8A7793_CLK_SCU_ALL 17 #define R8A7793_CLK_SCU_ALL 17
#define R8A7793_CLK_SCU_DVC1 18 #define R8A7793_CLK_SCU_DVC1 18
#define R8A7793_CLK_SCU_DVC0 19 #define R8A7793_CLK_SCU_DVC0 19
#define R8A7793_CLK_SCU_CTU1_MIX1 20
#define R8A7793_CLK_SCU_CTU0_MIX0 21
#define R8A7793_CLK_SCU_SRC9 22 #define R8A7793_CLK_SCU_SRC9 22
#define R8A7793_CLK_SCU_SRC8 23 #define R8A7793_CLK_SCU_SRC8 23
#define R8A7793_CLK_SCU_SRC7 24 #define R8A7793_CLK_SCU_SRC7 24
......
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