Commit fc79a4d6 authored by Joonyoung Shim's avatar Joonyoung Shim Committed by Chris Ball

mmc: dw_mmc: clear IDSTS register when initialize IDMAC

If pending interrupt for IDMAC exists when initialize IDMAC, it will
call interrupt handler unnecessarily.
Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Acked-by: default avatarSeungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: default avatarJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 60443712
......@@ -51,6 +51,11 @@
#define DW_MCI_DMA_THRESHOLD 16
#ifdef CONFIG_MMC_DW_IDMAC
#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
SDMMC_IDMAC_INT_TI)
struct idmac_desc {
u32 des0; /* Control Descriptor */
#define IDMAC_DES0_DIC BIT(1)
......@@ -433,6 +438,7 @@ static int dw_mci_idmac_init(struct dw_mci *host)
mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET);
/* Mask out interrupts - get Tx & Rx complete only */
mci_writel(host, IDSTS, IDMAC_INT_CLR);
mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI |
SDMMC_IDMAC_INT_TI);
......
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