Commit fcc5df72 authored by shaoyunl's avatar shaoyunl Committed by Alex Deucher

drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12

The new mechanism for unmapped doorbell handling requires both driver side and
MES fw side change. The FW side changes are still not released.
Signed-off-by: default avatarshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: default avatarHarish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 663bbfaf
......@@ -422,14 +422,7 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes)
mes_set_hw_res_pkt.disable_mes_log = 1;
mes_set_hw_res_pkt.use_different_vmid_compute = 1;
mes_set_hw_res_pkt.enable_reg_active_poll = 1;
/*
* No need to enable oversubscribe timer when we have unmapped doorbell
* handling support.
* handling mode - 0: disabled; 1: basic version; 2: basic+ version
*/
mes_set_hw_res_pkt.oversubscription_timer = 0;
mes_set_hw_res_pkt.unmapped_doorbell_handling = 1;
mes_set_hw_res_pkt.oversubscription_timer = 50;
mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;
......@@ -877,13 +870,6 @@ static int mes_v12_0_mqd_init(struct amdgpu_ring *ring)
mqd->cp_hqd_iq_timer = regCP_HQD_IQ_TIMER_DEFAULT;
mqd->cp_hqd_quantum = regCP_HQD_QUANTUM_DEFAULT;
/*
* Set CP_HQD_GFX_CONTROL.DB_UPDATED_MSG_EN[15] to enable unmapped
* doorbell handling. This is a reserved CP internal register can
* not be accesss by others
*/
mqd->reserved_184 = BIT(15);
return 0;
}
......
......@@ -238,8 +238,7 @@ union MESAPI_SET_HW_RESOURCES {
uint32_t send_write_data : 1;
uint32_t os_tdr_timeout_override : 1;
uint32_t use_rs64mem_for_proc_gang_ctx : 1;
uint32_t unmapped_doorbell_handling: 2;
uint32_t reserved : 15;
uint32_t reserved : 17;
};
uint32_t uint32_all;
};
......
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