Commit fccf9dd0 authored by Rob Clark's avatar Rob Clark

drm/msm/adreno: Move CP_PROTECT settings to hw catalog

Move the CP_PROTECT settings into the hw catalog.
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/599731/
parent dff2f69f
This diff is collapsed.
This diff is collapsed.
...@@ -16,9 +16,11 @@ extern bool hang_debug; ...@@ -16,9 +16,11 @@ extern bool hang_debug;
* struct a6xx_info - a6xx specific information from device table * struct a6xx_info - a6xx specific information from device table
* *
* @hwcg: hw clock gating register sequence * @hwcg: hw clock gating register sequence
* @protect: CP_PROTECT settings
*/ */
struct a6xx_info { struct a6xx_info {
const struct adreno_reglist *hwcg; const struct adreno_reglist *hwcg;
const struct adreno_protect *protect;
}; };
struct a6xx_gpu { struct a6xx_gpu {
......
...@@ -143,6 +143,19 @@ const struct adreno_gpulist name ## _gpulist = { \ ...@@ -143,6 +143,19 @@ const struct adreno_gpulist name ## _gpulist = { \
*/ */
#define ADRENO_SPEEDBINS(tbl...) (struct adreno_speedbin[]) { tbl {SHRT_MAX, 0} } #define ADRENO_SPEEDBINS(tbl...) (struct adreno_speedbin[]) { tbl {SHRT_MAX, 0} }
struct adreno_protect {
const uint32_t *regs;
uint32_t count;
uint32_t count_max;
};
#define DECLARE_ADRENO_PROTECT(name, __count_max) \
static const struct adreno_protect name = { \
.regs = name ## _regs, \
.count = ARRAY_SIZE(name ## _regs), \
.count_max = __count_max, \
};
struct adreno_gpu { struct adreno_gpu {
struct msm_gpu base; struct msm_gpu base;
const struct adreno_info *info; const struct adreno_info *info;
......
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