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Commit fcd9d346 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'v5.16-rockchip-dts32-2' of... 

Merge tag 'v5.16-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Adapt gpio subnode names to match the yaml binding and removal
of the actually non-matching fallback-string for usb-phys
on rk3066/rk3188 (most-specific compatible is and must always
be used).

* tag 'v5.16-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: remove usb-phy fallback string from rk3066a/rk3188
  ARM: dts: rockchip: change gpio nodenames

Link: https://lore.kernel.org/r/3630369.N7QejLDta5@philSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 40e7a399 97ef6931
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Showing with 32 additions and 34 deletions
arch/arm/boot/dts/rk3036.dtsi
View file @ fcd9d346
...@@ -575,7 +575,7 @@ pinctrl: pinctrl { ...@@ -575,7 +575,7 @@ pinctrl: pinctrl {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
gpio0: gpio0@2007c000 { gpio0: gpio@2007c000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2007c000 0x100>; reg = <0x2007c000 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
...@@ -588,7 +588,7 @@ gpio0: gpio0@2007c000 { ...@@ -588,7 +588,7 @@ gpio0: gpio0@2007c000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@20080000 { gpio1: gpio@20080000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>; reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
...@@ -601,7 +601,7 @@ gpio1: gpio1@20080000 { ...@@ -601,7 +601,7 @@ gpio1: gpio1@20080000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@20084000 { gpio2: gpio@20084000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>; reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm/boot/dts/rk3066a.dtsi
View file @ fcd9d346
...@@ -272,7 +272,7 @@ pinctrl: pinctrl { ...@@ -272,7 +272,7 @@ pinctrl: pinctrl {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
gpio0: gpio0@20034000 { gpio0: gpio@20034000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20034000 0x100>; reg = <0x20034000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
...@@ -285,7 +285,7 @@ gpio0: gpio0@20034000 { ...@@ -285,7 +285,7 @@ gpio0: gpio0@20034000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@2003c000 { gpio1: gpio@2003c000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>; reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
...@@ -298,7 +298,7 @@ gpio1: gpio1@2003c000 { ...@@ -298,7 +298,7 @@ gpio1: gpio1@2003c000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@2003e000 { gpio2: gpio@2003e000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>; reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
...@@ -311,7 +311,7 @@ gpio2: gpio2@2003e000 { ...@@ -311,7 +311,7 @@ gpio2: gpio2@2003e000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio3: gpio3@20080000 { gpio3: gpio@20080000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>; reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
...@@ -324,7 +324,7 @@ gpio3: gpio3@20080000 { ...@@ -324,7 +324,7 @@ gpio3: gpio3@20080000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio4: gpio4@20084000 { gpio4: gpio@20084000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>; reg = <0x20084000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
...@@ -337,7 +337,7 @@ gpio4: gpio4@20084000 { ...@@ -337,7 +337,7 @@ gpio4: gpio4@20084000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio6: gpio6@2000a000 { gpio6: gpio@2000a000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2000a000 0x100>; reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
...@@ -681,8 +681,7 @@ &grf { ...@@ -681,8 +681,7 @@ &grf {
compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd"; compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd";
usbphy: usbphy { usbphy: usbphy {
compatible = "rockchip,rk3066a-usb-phy", compatible = "rockchip,rk3066a-usb-phy";
"rockchip,rk3288-usb-phy";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
......
arch/arm/boot/dts/rk3188.dtsi
View file @ fcd9d346
...@@ -223,7 +223,7 @@ pinctrl: pinctrl { ...@@ -223,7 +223,7 @@ pinctrl: pinctrl {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
gpio0: gpio0@2000a000 { gpio0: gpio@2000a000 {
compatible = "rockchip,rk3188-gpio-bank0"; compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>; reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
...@@ -236,7 +236,7 @@ gpio0: gpio0@2000a000 { ...@@ -236,7 +236,7 @@ gpio0: gpio0@2000a000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@2003c000 { gpio1: gpio@2003c000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>; reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
...@@ -249,7 +249,7 @@ gpio1: gpio1@2003c000 { ...@@ -249,7 +249,7 @@ gpio1: gpio1@2003c000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@2003e000 { gpio2: gpio@2003e000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>; reg = <0x2003e000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
...@@ -262,7 +262,7 @@ gpio2: gpio2@2003e000 { ...@@ -262,7 +262,7 @@ gpio2: gpio2@2003e000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio3: gpio3@20080000 { gpio3: gpio@20080000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20080000 0x100>; reg = <0x20080000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
...@@ -647,8 +647,7 @@ io_domains: io-domains { ...@@ -647,8 +647,7 @@ io_domains: io-domains {
}; };
usbphy: usbphy { usbphy: usbphy {
compatible = "rockchip,rk3188-usb-phy", compatible = "rockchip,rk3188-usb-phy";
"rockchip,rk3288-usb-phy";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
......
arch/arm/boot/dts/rk322x.dtsi
View file @ fcd9d346
...@@ -946,7 +946,7 @@ pinctrl: pinctrl { ...@@ -946,7 +946,7 @@ pinctrl: pinctrl {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
gpio0: gpio0@11110000 { gpio0: gpio@11110000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x11110000 0x100>; reg = <0x11110000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
...@@ -959,7 +959,7 @@ gpio0: gpio0@11110000 { ...@@ -959,7 +959,7 @@ gpio0: gpio0@11110000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@11120000 { gpio1: gpio@11120000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x11120000 0x100>; reg = <0x11120000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
...@@ -972,7 +972,7 @@ gpio1: gpio1@11120000 { ...@@ -972,7 +972,7 @@ gpio1: gpio1@11120000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@11130000 { gpio2: gpio@11130000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x11130000 0x100>; reg = <0x11130000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
...@@ -985,7 +985,7 @@ gpio2: gpio2@11130000 { ...@@ -985,7 +985,7 @@ gpio2: gpio2@11130000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio3: gpio3@11140000 { gpio3: gpio@11140000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x11140000 0x100>; reg = <0x11140000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm/boot/dts/rk3288.dtsi
View file @ fcd9d346
...@@ -1422,7 +1422,7 @@ pinctrl: pinctrl { ...@@ -1422,7 +1422,7 @@ pinctrl: pinctrl {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
gpio0: gpio0@ff750000 { gpio0: gpio@ff750000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>; reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1435,7 +1435,7 @@ gpio0: gpio0@ff750000 { ...@@ -1435,7 +1435,7 @@ gpio0: gpio0@ff750000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@ff780000 { gpio1: gpio@ff780000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>; reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1448,7 +1448,7 @@ gpio1: gpio1@ff780000 { ...@@ -1448,7 +1448,7 @@ gpio1: gpio1@ff780000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@ff790000 { gpio2: gpio@ff790000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>; reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1461,7 +1461,7 @@ gpio2: gpio2@ff790000 { ...@@ -1461,7 +1461,7 @@ gpio2: gpio2@ff790000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio3: gpio3@ff7a0000 { gpio3: gpio@ff7a0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>; reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1474,7 +1474,7 @@ gpio3: gpio3@ff7a0000 { ...@@ -1474,7 +1474,7 @@ gpio3: gpio3@ff7a0000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio4: gpio4@ff7b0000 { gpio4: gpio@ff7b0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7b0000 0x0 0x100>; reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1487,7 +1487,7 @@ gpio4: gpio4@ff7b0000 { ...@@ -1487,7 +1487,7 @@ gpio4: gpio4@ff7b0000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio5: gpio5@ff7c0000 { gpio5: gpio@ff7c0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7c0000 0x0 0x100>; reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1500,7 +1500,7 @@ gpio5: gpio5@ff7c0000 { ...@@ -1500,7 +1500,7 @@ gpio5: gpio5@ff7c0000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio6: gpio6@ff7d0000 { gpio6: gpio@ff7d0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7d0000 0x0 0x100>; reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1513,7 +1513,7 @@ gpio6: gpio6@ff7d0000 { ...@@ -1513,7 +1513,7 @@ gpio6: gpio6@ff7d0000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio7: gpio7@ff7e0000 { gpio7: gpio@ff7e0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7e0000 0x0 0x100>; reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1526,7 +1526,7 @@ gpio7: gpio7@ff7e0000 { ...@@ -1526,7 +1526,7 @@ gpio7: gpio7@ff7e0000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio8: gpio8@ff7f0000 { gpio8: gpio@ff7f0000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7f0000 0x0 0x100>; reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm/boot/dts/rv1108.dtsi
View file @ fcd9d346
...@@ -600,7 +600,7 @@ pinctrl: pinctrl { ...@@ -600,7 +600,7 @@ pinctrl: pinctrl {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
gpio0: gpio0@20030000 { gpio0: gpio@20030000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x20030000 0x100>; reg = <0x20030000 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
...@@ -613,7 +613,7 @@ gpio0: gpio0@20030000 { ...@@ -613,7 +613,7 @@ gpio0: gpio0@20030000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio1: gpio1@10310000 { gpio1: gpio@10310000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x10310000 0x100>; reg = <0x10310000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
...@@ -626,7 +626,7 @@ gpio1: gpio1@10310000 { ...@@ -626,7 +626,7 @@ gpio1: gpio1@10310000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio2: gpio2@10320000 { gpio2: gpio@10320000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x10320000 0x100>; reg = <0x10320000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
...@@ -639,7 +639,7 @@ gpio2: gpio2@10320000 { ...@@ -639,7 +639,7 @@ gpio2: gpio2@10320000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
}; };
gpio3: gpio3@10330000 { gpio3: gpio@10330000 {
compatible = "rockchip,gpio-bank"; compatible = "rockchip,gpio-bank";
reg = <0x10330000 0x100>; reg = <0x10330000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
......
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