Commit fe06fe86 authored by Michael Ellerman's avatar Michael Ellerman

selftests/powerpc: Fix TM resched DSCR test with some compilers

The tm-resched-dscr test has started failing sometimes, depending on
what compiler it's built with, eg:

  test: tm_resched_dscr
  Check DSCR TM context switch: tm-resched-dscr: tm-resched-dscr.c:76: test_body: Assertion `rv' failed.
  !! child died by signal 6

When it fails we see that the compiler doesn't initialise rv to 1 before
entering the inline asm block. Although that's counter intuitive, it
is allowed because we tell the compiler that the inline asm will write
to rv (using "=r"), meaning the original value is irrelevant.

Marking it as a read/write parameter would presumably work, but it seems
simpler to fix it by setting the initial value of rv in the inline asm.

Fixes: 96d01610 ("powerpc: Correct DSCR during TM context switch")
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Acked-by: default avatarMichael Neuling <mikey@neuling.org>
parent e41e53cd
...@@ -42,12 +42,12 @@ int test_body(void) ...@@ -42,12 +42,12 @@ int test_body(void)
printf("Check DSCR TM context switch: "); printf("Check DSCR TM context switch: ");
fflush(stdout); fflush(stdout);
for (;;) { for (;;) {
rv = 1;
asm __volatile__ ( asm __volatile__ (
/* set a known value into the DSCR */ /* set a known value into the DSCR */
"ld 3, %[dscr1];" "ld 3, %[dscr1];"
"mtspr %[sprn_dscr], 3;" "mtspr %[sprn_dscr], 3;"
"li %[rv], 1;"
/* start and suspend a transaction */ /* start and suspend a transaction */
"tbegin.;" "tbegin.;"
"beq 1f;" "beq 1f;"
......
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