Commit fe120434 authored by Alex Deucher's avatar Alex Deucher Committed by Greg Kroah-Hartman

drm/radeon/kms: fix MSI re-arm on rv370+

commit b7f5b7de upstream.

MSI_REARM_EN register is a write only trigger register.
There is no need RMW when re-arming.

May fix:
https://bugs.freedesktop.org/show_bug.cgi?id=41668Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 49f936fe
...@@ -681,9 +681,7 @@ int r100_irq_process(struct radeon_device *rdev) ...@@ -681,9 +681,7 @@ int r100_irq_process(struct radeon_device *rdev)
WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
break; break;
default: default:
msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
WREG32(RADEON_MSI_REARM_EN, msi_rearm);
WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
break; break;
} }
} }
......
...@@ -698,9 +698,7 @@ int rs600_irq_process(struct radeon_device *rdev) ...@@ -698,9 +698,7 @@ int rs600_irq_process(struct radeon_device *rdev)
WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
break; break;
default: default:
msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
WREG32(RADEON_MSI_REARM_EN, msi_rearm);
WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
break; break;
} }
} }
......
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