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Kirill Smelkov
linux
Commits
ff4b4af1
Commit
ff4b4af1
authored
Nov 30, 2014
by
Alex Deucher
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drm/radeon: fix typo in new fan control registers for SI/CI
Signed-off-by:
Alex Deucher
<
alexander.deucher@amd.com
>
parent
c1f0a9c2
Changes
2
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2 changed files
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8 additions
and
8 deletions
+8
-8
drivers/gpu/drm/radeon/cikd.h
drivers/gpu/drm/radeon/cikd.h
+4
-4
drivers/gpu/drm/radeon/sid.h
drivers/gpu/drm/radeon/sid.h
+4
-4
No files found.
drivers/gpu/drm/radeon/cikd.h
View file @
ff4b4af1
...
@@ -213,18 +213,18 @@
...
@@ -213,18 +213,18 @@
#define CG_FDO_CTRL0 0xC0300064
#define CG_FDO_CTRL0 0xC0300064
#define FDO_STATIC_DUTY(x) ((x) << 0)
#define FDO_STATIC_DUTY(x) ((x) << 0)
#define FDO_STATIC_DUTY_MASK 0x000000
0
F
#define FDO_STATIC_DUTY_MASK 0x000000
F
F
#define FDO_STATIC_DUTY_SHIFT 0
#define FDO_STATIC_DUTY_SHIFT 0
#define CG_FDO_CTRL1 0xC0300068
#define CG_FDO_CTRL1 0xC0300068
#define FMAX_DUTY100(x) ((x) << 0)
#define FMAX_DUTY100(x) ((x) << 0)
#define FMAX_DUTY100_MASK 0x000000
0
F
#define FMAX_DUTY100_MASK 0x000000
F
F
#define FMAX_DUTY100_SHIFT 0
#define FMAX_DUTY100_SHIFT 0
#define CG_FDO_CTRL2 0xC030006C
#define CG_FDO_CTRL2 0xC030006C
#define TMIN(x) ((x) << 0)
#define TMIN(x) ((x) << 0)
#define TMIN_MASK 0x000000
0
F
#define TMIN_MASK 0x000000
F
F
#define TMIN_SHIFT 0
#define TMIN_SHIFT 0
#define FDO_PWM_MODE(x) ((x) << 11)
#define FDO_PWM_MODE(x) ((x) << 11)
#define FDO_PWM_MODE_MASK (
3
<< 11)
#define FDO_PWM_MODE_MASK (
7
<< 11)
#define FDO_PWM_MODE_SHIFT 11
#define FDO_PWM_MODE_SHIFT 11
#define TACH_PWM_RESP_RATE(x) ((x) << 25)
#define TACH_PWM_RESP_RATE(x) ((x) << 25)
#define TACH_PWM_RESP_RATE_MASK (0x7f << 25)
#define TACH_PWM_RESP_RATE_MASK (0x7f << 25)
...
...
drivers/gpu/drm/radeon/sid.h
View file @
ff4b4af1
...
@@ -208,18 +208,18 @@
...
@@ -208,18 +208,18 @@
#define CG_FDO_CTRL0 0x754
#define CG_FDO_CTRL0 0x754
#define FDO_STATIC_DUTY(x) ((x) << 0)
#define FDO_STATIC_DUTY(x) ((x) << 0)
#define FDO_STATIC_DUTY_MASK 0x000000
0
F
#define FDO_STATIC_DUTY_MASK 0x000000
F
F
#define FDO_STATIC_DUTY_SHIFT 0
#define FDO_STATIC_DUTY_SHIFT 0
#define CG_FDO_CTRL1 0x758
#define CG_FDO_CTRL1 0x758
#define FMAX_DUTY100(x) ((x) << 0)
#define FMAX_DUTY100(x) ((x) << 0)
#define FMAX_DUTY100_MASK 0x000000
0
F
#define FMAX_DUTY100_MASK 0x000000
F
F
#define FMAX_DUTY100_SHIFT 0
#define FMAX_DUTY100_SHIFT 0
#define CG_FDO_CTRL2 0x75C
#define CG_FDO_CTRL2 0x75C
#define TMIN(x) ((x) << 0)
#define TMIN(x) ((x) << 0)
#define TMIN_MASK 0x000000
0
F
#define TMIN_MASK 0x000000
F
F
#define TMIN_SHIFT 0
#define TMIN_SHIFT 0
#define FDO_PWM_MODE(x) ((x) << 11)
#define FDO_PWM_MODE(x) ((x) << 11)
#define FDO_PWM_MODE_MASK (
3
<< 11)
#define FDO_PWM_MODE_MASK (
7
<< 11)
#define FDO_PWM_MODE_SHIFT 11
#define FDO_PWM_MODE_SHIFT 11
#define TACH_PWM_RESP_RATE(x) ((x) << 25)
#define TACH_PWM_RESP_RATE(x) ((x) << 25)
#define TACH_PWM_RESP_RATE_MASK (0x7f << 25)
#define TACH_PWM_RESP_RATE_MASK (0x7f << 25)
...
...
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