Commit ff85a7a9 authored by Michael Walle's avatar Michael Walle Committed by Claudiu Beznea

ARM: dts: lan966x: add reset switch reset node

Add the switch reset node which will later be used by the switch driver.
The switch reset also resets the GPIO controller and the SGPIO
controller, thus it also has to be connectected to these nodes. This way
the reset will only issued once for the first device requesting the
reset.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-11-michael@walle.ccSigned-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
parent 6ad69e07
......@@ -391,6 +391,11 @@ watchdog: watchdog@e0090000 {
status = "disabled";
};
cpu_ctrl: syscon@e00c0000 {
compatible = "microchip,lan966x-cpu-syscon", "syscon";
reg = <0xe00c0000 0x350>;
};
can0: can@e081c000 {
compatible = "bosch,m_can";
reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
......@@ -406,10 +411,20 @@ can0: can@e081c000 {
status = "disabled";
};
reset: reset-controller@e200400c {
compatible = "microchip,lan966x-switch-reset";
reg = <0xe200400c 0x4>;
reg-names = "gcb";
#reset-cells = <1>;
cpu-syscon = <&cpu_ctrl>;
};
gpio: pinctrl@e2004064 {
compatible = "microchip,lan966x-pinctrl";
reg = <0xe2004064 0xb4>,
<0xe2010024 0x138>;
resets = <&reset 0>;
reset-names = "switch";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&gpio 0 0 78>;
......@@ -453,6 +468,8 @@ sgpio: gpio@e2004190 {
compatible = "microchip,sparx5-sgpio";
reg = <0xe2004190 0x118>;
clocks = <&sys_clk>;
resets = <&reset 0>;
reset-names = "switch";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
......
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