- 31 Aug, 2017 3 commits
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Colin Ian King authored
The variable gc is assigned but never read and is redundant. Remove it. Cleans up clang warning: drivers/gpio/gpio-mockup.c:169:2: warning: Value stored to 'gc' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Arvind Yadav authored
amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This reverts commit 108d23e3. It turns out this causes a regression on the OMAP, Marvell and Renesas. Reported-by: Tony Lindgren <tony@atomide.com> Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reported-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 23 Aug, 2017 3 commits
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Masahiro Yamada authored
There is no reference to twl6040gpo_chip before its definition. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bhumika Goyal authored
Make this const as it is only used as a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dmitry Torokhov authored
When converting legacy board to use gpiod API() there might be several lookup tables in board file, let's provide a way to register them all at once. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 22 Aug, 2017 4 commits
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Biju Das authored
Renesas RZ/G1E (R8A7745) SoC GPIO blocks are identical to the R-Car Gen2 family. Add support for its GPIO controllers. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Masahiro Yamada authored
Because gpiochip_irqchip_add() may fail, its return value should be checked. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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David Daney authored
Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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David Daney authored
Cavium ThunderX and OCTEON-TX are arm64 based SoCs. Add driver for the on-chip GPIO pins. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 20 Aug, 2017 10 commits
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Bartosz Golaszewski authored
Shrink the driver by removing the code dealing with dummy interrupts and replacing it with calls to the irq_sim API. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Use resource managed variants of irq_alloc_generic_chip() and irq_setup_generic_chip(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
This driver is non-modular so explicitly disallow a driver unbind. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
This driver is non-modular so explicitly disallow a driver unbind. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
This driver is non-modular so explicitly disallow a driver unbind. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 18 Aug, 2017 5 commits
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David Daney authored
For an already existing irqdomain hierarchy, as might be obtained via a call to pci_enable_msix_range(), a PCI driver wishing to add an additional irqdomain to the hierarchy needs to be able to insert the irqdomain to that already initialized hierarchy. Calling irq_domain_create_hierarchy() allows the new irqdomain to be created, but no existing code allows for initializing the associated irq_data. Add a couple of helper functions (irq_domain_push_irq() and irq_domain_pop_irq()) to initialize the irq_data for the new irqdomain added to an existing hierarchy. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Link: http://lkml.kernel.org/r/1503017616-3252-6-git-send-email-david.daney@cavium.com
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David Daney authored
A follow-on patch will call irq_domain_free_irqs_hierarchy() when the free() function pointer may be NULL. Add a NULL pointer check to handle this new use case. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Link: http://lkml.kernel.org/r/1503017616-3252-5-git-send-email-david.daney@cavium.com
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David Daney authored
The code to add and remove items to and from the revmap occurs several times. In preparation for the follow on patches that add more uses of this code, factor this out in to separate static functions. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Link: http://lkml.kernel.org/r/1503017616-3252-4-git-send-email-david.daney@cavium.com
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David Daney authored
Follow-on patch for gpio-thunderx uses a irqdomain hierarchy which requires slightly different flow handlers, add them to chip.c which contains most of the other flow handlers. Make these conditionally compiled based on CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Link: http://lkml.kernel.org/r/1503017616-3252-3-git-send-email-david.daney@cavium.com
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David Daney authored
Many of the family of functions including irq_chip_mask_parent(), irq_chip_unmask_parent() are exported, but not all. Add EXPORT_SYMBOL_GPL to irq_chip_enable_parent, irq_chip_disable_parent and irq_chip_set_affinity_parent, so they likewise are usable from modules. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Link: http://lkml.kernel.org/r/1503017616-3252-2-git-send-email-david.daney@cavium.com
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- 16 Aug, 2017 2 commits
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Bartosz Golaszewski authored
Add a resource managed version of irq_sim_init(). This can be conveniently used in device drivers. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org> Cc: Jonathan Cameron <jic23@kernel.org> Link: http://lkml.kernel.org/r/20170814145318.6495-3-brgl@bgdev.plSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Bartosz Golaszewski authored
Implement a simple, irq_work-based framework for simulating interrupts. Currently the API exposes routines for initializing and deinitializing the simulator object, enqueueing the interrupts and retrieving the allocated interrupt numbers based on the offset of the dummy interrupt in the simulator struct. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-doc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org> Cc: Jonathan Cameron <jic23@kernel.org> Link: http://lkml.kernel.org/r/20170814145318.6495-2-brgl@bgdev.plSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 15 Aug, 2017 2 commits
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Andrew Jeffery authored
HPLL is in fact not the clock we need. Remove the description of which clock we failed to find a phandle to in order to avoid any further error. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
HPLL is in fact not the clock we need. Remove prescription of which clock to avoid further error. Please refer to your datasheet and double check like I should have. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 14 Aug, 2017 11 commits
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Fabio Estevam authored
74HC595 has an /OE (output enable) pin that can be controlled by a GPIO. Introduce an optional property called 'enable-gpios' that allows controlling the /OE pin. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bhumika Goyal authored
Make the structure const as it is only passed to the function devm_regmap_add_irq_chip having the corresponding argument as const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Michal Simek authored
Fix function parameters alignment reported by checkpatch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nava kishore Manne authored
This patch fixes the below warning -->Block comments should align the * on each line. -->suspect code indent for conditional statements. -->Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Michal Simek authored
Remove one additional line and add two new. All are reported by checkpatch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nava kishore Manne authored
This patch fixes the kernel doc warnings in the driver. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Swapna Manupati authored
This patch provides workaround in the gpio driver for Zynq and ZynqMP Platforms by reading pin value of EMIO banks through DATA register as it was unable to read the value of it from DATA_RO register. Signed-off-by: Swapna Manupati <swapnam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Shubhrajyoti Datta authored
Add support for suspend resume. Now that we can lose context across a suspend/ resume cycle. Add support for the context restore. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rajmohan Mani authored
This patch adds support for TPS68470 GPIOs. There are 7 GPIOs and a few sensor related GPIOs. These GPIOs can be requested and configured as appropriate. The GPIOs are also provided with descriptive names. However, the typical use case is that the OS GPIO driver will interact with TPS68470 GPIO driver to configure these GPIOs, as requested by the platform firmware. Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Keerthy authored
Currently davinci_gpio_irq_setup return value is ignored. Handle the return value appropriately. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Keerthy authored
The patch adds keystone-k2g compatible, specific properties and an example. The patch also adds the details of supported SoCs for each compatible. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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