- 24 Sep, 2010 40 commits
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Ben Skeggs authored
Should fix issues noticed on NVAC (MacBook Pro / ION) since gpuobj rework. Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
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Ben Skeggs authored
Found on NV3x boards, this should allow voltage modifications to work on these chipsets. Signed-off-by: -
Ben Skeggs authored
Reported-by:
Roy Spliet <r.spliet@student.tudelft.nl> Signed-off-by:
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Phil Turmel authored
Build breakage: drivers/built-in.o: In function `nouveau_acpi_edid': (.text+0x13404e): undefined reference to `acpi_video_get_edid' make: *** [.tmp_vmlinux1] Error 1 Introduced by: a6ed76d7 is the first bad commit commit a6ed76d7 Author: Ben Skeggs <bskeggs@redhat.com> Date: Mon Jul 12 15:33:07 2010 +1000 drm/nouveau: support fetching LVDS EDID from ACPI Based on a patch from Matthew Garrett. Signed-off-by:
Matthew Garrett <mjg@redhat.com> It doesn't seem to revert cleanly, but the problem lies in these two config entries: CONFIG_ACPI=y CONFIG_ACPI_VIDEO=m Adding a select for ACPI_VIDEO appears to be the best solution, and is comparable to what is done in DRM_I915. Builds, boots, and appears to work correctly. Signed-off-by:
Philip J. Turmel <philip@turmel.org> Signed-off-by:
Francisco Jerez <currojerez@riseup.net> Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
Guarded by a module parameter for the moment, read the code for the magic value which enables it. Signed-off-by: -
Ben Skeggs authored
Currently just hooked up to the already-existing nouveau_hw, which should handle all relevant chipsets as well as we currently can. This will likely be eventually split out and improved into chipset specific code at a later point. Signed-off-by: -
Ben Skeggs authored
This will make nouveau_pm attempt to report the card's current performance level both during bootup, and through sysfs. This is a very initial implementation, and can be improved a *lot* Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
This replaces all the pll_types definitions for ones that match the types used in the tables in recent VBIOS versions. get_pll_limits() will now accept either type or register value as input across all limits table versions, and will store the actual register ID that a PLL type refers to in the returned structure. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
The rest of the connector code assumes we can kfree() the EDID pointer. This causes things to blow up with the ACPI EDID pointer we get passed. Signed-off-by: -
Ben Skeggs authored
The most important part of this change is that we now instruct PFIFO to drop all pending fetches, rather than attempting to skip a single dword and hope that things would magically sort themselves out - they usually don't, and we end up with PFIFO being completely hung. This commit also adds somewhat more useful logging when these exceptions occur. Signed-off-by: -
Ben Skeggs authored
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Francisco Jerez authored
More Apple brain damage, it fixes the modesetting failure on an eMac G4 (fdo bug 29810). Reported-by:
Zoltan Varnagy <doi@freemail.hu> Signed-off-by:
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Francisco Jerez authored
Instead of emptying the caches to avoid a race with the PFIFO puller, go straight ahead and try to recover from it when it happens. Also, kill pfifo->cache_flush and tile->lock, we don't need them anymore. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
This makes sure that RAMHT is cleared correctly on start up. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
FW seems to be broken on nv18, it causes random lockups and breaks suspend/resume even with the blob. Signed-off-by:
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Francisco Jerez authored
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Francisco Jerez authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Marcin Kościelnicki authored
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Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by:
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Ben Skeggs authored
This doesn't actually happen now, but there's a test case for an earlier kernel where a GPU error is signalled on one of nv50's fake channels, and the ramht lookup by the IRQ handler triggered an oops. This adds a check for RAMHT's existance on a channel before looking up an object handle. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Will be used at a later point when we plug in an alternative VRAM memory manager for GeForce 8+ boards. Based on pscnv code to do the same. Signed-off-by:
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Ben Skeggs authored
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Ben Skeggs authored
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